|
 | src/intel/vulkan/anv_pipeline_cache.c (diff) |
|
 | src/compiler/nir/nir_builder.h (diff) |
Commit
5ee32428373dd2e9ffcb419d26cb8ebe3788f298
by eric+margeanv: Patch constant data pointers into shaders with using softpin
When we have softpin, we know the address of the shader constant data at shader upload time because it's sitting at the end of the shader. This commit changes ANV to use patch constants to embed the address in the shader patch the right address in at upload time. This allows us to avoid having to set up a UBO binding on-the-fly for shader constants.
This commit uses an A64 message but it's quite possible that we could also use an A32 message and make the dataport do the 64-bit add for us. However, load_global is what we have right now so it was easier to just use that.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>
|
 | src/intel/vulkan/anv_nir_apply_pipeline_layout.c (diff) |
 | src/intel/vulkan/anv_pipeline_cache.c (diff) |
 | src/intel/vulkan/anv_private.h (diff) |
|
 | src/gallium/drivers/iris/iris_program_cache.c (diff) |
 | src/gallium/drivers/iris/iris_context.h (diff) |
 | src/gallium/drivers/iris/iris_program.c (diff) |
 | src/gallium/drivers/iris/iris_disk_cache.c (diff) |
 | src/gallium/drivers/iris/iris_state.c (diff) |
Commit
8c43edf9f917a801a18940bb570a295b7eed7f90
by eric+margenir: fix a bug in is_dual_slot in nir_io_add_const_offset_to_base
Fixes: 01ab308edc "nir: update IO semantics in nir_io_add_const_offset_to_base"
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6540>
|
 | src/compiler/nir/nir_lower_io.c (diff) |
Commit
95415a54c007a909f0fb9d1b2567beecbd73d403
by eric+margest/mesa: fix lowered IO - don't call st_nir_assign_vs_in_locations twice
If IO is lowered, the second call is a no-op, which breaks: spec@!opengl 1.1@gl-1.1-color-material-unused-normal-array
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6540>
|
 | src/mesa/state_tracker/st_program.c (diff) |
Commit
8e8701b43a0fc1997ecdb6a9557dd3e2c1a0d398
by eric+margeintel/fs: Don't copy-propagate stride=0 sources into ddx/ddy
This can come up if, for instance, the shader does a derivative of a uniform or flat input. Ideally, NIR would use divergence analysis to get rid of the derivative in this case but it doesn't right now. This fixes a crash in F1 2017.
Cc: mesa-stable@lists.freedesktop.org Reported-by: Marcin Ślusarz <marcin.slusarz@intel.com> Tested-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6564>
|
 | src/intel/compiler/brw_fs_copy_propagation.cpp (diff) |
Commit
5799da47c794aced34187df2eee6fd349c51b931
by eric+margeintel/fs: Use a single untyped surface read for load_num_work_groups
There's no good reason to split this into three. Sure, CS indirects are only guaranteed by the spec to be DWORD aligned, but that's all untyped surface reads require anyway.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6570>
|
 | src/intel/compiler/brw_fs_nir.cpp (diff) |
Commit
fe18a0fd45c79cdba7b63959657861488c775c0d
by eric+margeintel/nir: Lower load_num_work_groups to 32-bit if needed
For OpenCL-style kernels, this builtin is 64-bit.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6570>
|
 | src/intel/compiler/brw_fs_nir.cpp (diff) |
 | src/intel/compiler/brw_nir_lower_cs_intrinsics.c (diff) |
Commit
bbaa62e4e156012f05d2ddd9b19610d6465b62e7
by eric+margeiris: Re-emit push constants if we have a varying workgroup size
Fixes: 33c61eb2f10526 "iris: Implement ARB_compute_variable_group_size"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6570>
|
 | src/gallium/drivers/iris/iris_state.c (diff) |
|
 | docs/relnotes/20.1.7.rst |
|
 | docs/release-calendar.rst (diff) |
 | docs/relnotes.rst (diff) |
Commit
e953f6c001566f8acbbeaa9bf853f03074023b36
by eric+margedocs: shift 20.2 rc dates by two weeks to match reality
The release candidates have slipped by a couple of weeks, so let's fix the dates in the calendar.
Signed-off-by: Eric Engestrom <eric@engestrom.ch> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6574>
|
 | docs/release-calendar.rst (diff) |
Commit
aae1e68637ff662d45902954390e678516798ecf
by eric+margefreedreno: Fix missing rsc->seqno updates
There were a couple paths where we weren't getting valid seqno's, which are supposed to be updated whenever the backing bo is set/changed. So wrap that up in a helper to make it harder to mess up.
Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6575>
|
 | src/gallium/drivers/freedreno/freedreno_resource.c (diff) |
 | src/gallium/drivers/freedreno/freedreno_resource.h (diff) |
Commit
bf23ff83e69a76424ea083c6641b952868e4b87c
by eric+margefreedreno: fence_server_sync() fixes
Two potential problems, batch re-ordering doesn't really play nicely with fence_server_sync(), so when we switch away from one batch, detect the case that we need to sync, and if so flush. The alternative of trying to track that later batches depend on an earlier batch that had an in-fence is hairy, and the normal use-case would be to sync at the beginning of the frame.
But this brings up the second problem, which is that typically we'll get told to sync on an in-fence before the first draw, which means before mesa/st flushes down the framebuffer state to the driver. Which means we don't yet have the correct batch to attach the fence to. So we need to track the in-fence on the context, and transfer it to the batch before draws, etc.
Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6575>
|
 | src/gallium/drivers/freedreno/freedreno_context.c (diff) |
 | src/gallium/drivers/freedreno/freedreno_fence.c (diff) |
 | src/gallium/drivers/freedreno/freedreno_context.h (diff) |
 | src/gallium/drivers/freedreno/freedreno_state.c (diff) |
 | src/gallium/drivers/freedreno/freedreno_batch_cache.c (diff) |
Commit
0464ee7f9d9383175c31192500ee9e6d9f01fe60
by maraeoradeonsi: don't crash if input_usage_mask is 0 for a VS input
This will start happening with the lowered IO intrinstics and new scanning code.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6445>
|
 | src/gallium/drivers/radeonsi/si_shader_llvm_vs.c (diff) |
Commit
ed9391df3f6fde4cb0ac85f3fa4d5fc4409555a1
by maraeoradeonsi: get color interpolation info from shader_info
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6445>
|
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
Commit
44eaee688b5967e87285a7e88864b4fb84441f0e
by maraeoradeonsi: clean up code for loading VS inputs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6445>
|
 | src/gallium/drivers/radeonsi/si_shader_llvm_vs.c (diff) |
Commit
408fc4e3ac9aea0188c385b89ad888ba0f13bd94
by maraeoac/nir: handle all lowered IO intrinsics
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6445>
|
 | src/amd/vulkan/radv_nir_to_llvm.c (diff) |
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
 | src/amd/llvm/ac_shader_abi.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_tess.c (diff) |
Commit
81d106d6ecab326c96fb9f8db8e7f39621c9816e
by maraeoradeonsi: lower IO intrinsics - complete rewrite of input/output scanning
Input and output info is gathered from intrinsics. nir_variables are ignored (and we'll remove them anyway).
This is a prerequisite for ACO, but also makes the IR prettier. The ac_nir_to_llvm change has to be in this commit.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6445>
|
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_tess.c (diff) |
Commit
f4d0565f5261d49e675c55183f77269a736c3e2b
by maraeoradeonsi: remove in/out/uniform variables from NIR after lowering IO
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6445>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
08ee72100fe22e067564cf71c25131771203dd36
by maraeoradeonsi: don't lower indirect IO in GLSL
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6445>
|
 | src/gallium/drivers/radeonsi/si_get.c (diff) |
Commit
562b8c1a4793e5e448f9df8f91babcc164051dbd
by maraeoradeonsi: don't execute LDS stores for TCS outputs that are never read
This is a per-component version of the previous mechanism.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>
|
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_tess.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
14391533f81e537b6a9fa545019aa6ef0bea7597
by maraeoradeonsi: simplify handling color interp modes in si_emit_spi_map
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>
|
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
Commit
b1cb72c44909fe971304da3f06e3910dea754e65
by maraeoradeonsi: change PIPE_SHADER to MESA_SHADER (si_shader_selector::type)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/gfx10_shader_ngg.c (diff) |
 | src/gallium/drivers/radeonsi/si_compute.c (diff) |
 | src/gallium/drivers/radeonsi/si_debug.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.h (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_state.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_gs.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
Commit
b4b323c81ee8ea6e756f4c5110f7ac77545325f1
by maraeoradeonsi: change PIPE_SHADER to MESA_SHADER (si_shader_context::type)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>
|
 | src/gallium/drivers/radeonsi/si_shader_llvm_gs.c (diff) |
 | src/gallium/drivers/radeonsi/gfx10_shader_ngg.c (diff) |
 | src/gallium/drivers/radeonsi/si_compute_prim_discard.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_internal.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_tess.c (diff) |
Commit
3c54d73e4b54c9519170dba27939dadc0d5eb20e
by maraeoradeonsi: change PIPE_SHADER to MESA_SHADER (debug flags)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>
|
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_gs.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm.c (diff) |
Commit
a90d1df8204b108fffb53fd20eecf6b5f61be6fa
by maraeoradeonsi: change PIPE_SHADER to MESA_SHADER (si_compile_llvm)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>
|
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_gs.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_internal.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm.c (diff) |
Commit
5151421ad0fcb33ca41d27c01090a1329085f7e7
by maraeoradeonsi: change PIPE_SHADER to MESA_SHADER (si_get_shader_part)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>
|
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
Commit
62aaa0d0b7675d3532d280bdc1221bacca63f7f6
by maraeoradeonsi: remove unused si_shader_context::type
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>
|
 | src/gallium/drivers/radeonsi/si_compute_prim_discard.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_internal.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_gs.c (diff) |
Commit
cbfc13b27c4ab30037c42b75bf6f7db17ff3d338
by maraeoradeonsi: change PIPE_SHADER to MESA_SHADER (si_shader_dump_disassembly)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>
|
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
Commit
966307983bda3fc6141a33bb5300a91fd15d5551
by maraeoradeonsi: precompute si_*_descriptors_idx in si_shader_selector
It helps remove one use of sel->type.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>
|
 | src/gallium/drivers/radeonsi/si_descriptors.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_compute.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
Commit
23fdb79e92fc0a0c26a4fdcf485ecd298fb01afc
by maraeoradeonsi: change PIPE_SHADER to MESA_SHADER (si_dump_descriptors)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>
|
 | src/gallium/drivers/radeonsi/si_debug.c (diff) |
Commit
6925401a3872304e0f50a1ee1eb72e7e655079f6
by maraeoradeonsi: remove si_shader_selector::type
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>
|
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_compute.c (diff) |
Commit
99fe3ef8ba400d9555a832d0feade58f5ca3d604
by maraeocompiler: add INTERP_MODE_COLOR for radeonsi
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>
|
 | src/compiler/glsl/ir_print_visitor.cpp (diff) |
 | src/compiler/shader_enums.c (diff) |
 | src/compiler/shader_enums.h (diff) |
Commit
a803008c7f1e4b0bdf0a377cdcf4fe853fd20e1f
by maraeoradeonsi: replace TGSI_INTERPOLATE with INTERP_MODE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>
|
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
Commit
6ecb8b689976d21868e56a4f59f1354ea256d23d
by maraeoradeonsi: replace TGSI_SEMANTIC with VARYING_SLOT and FRAG_RESULT
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>
|
 | src/gallium/drivers/radeonsi/si_shader_internal.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_tess.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_gs.c (diff) |
 | src/gallium/drivers/radeonsi/gfx10_shader_ngg.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_vs.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_ps.c (diff) |
Commit
98e866c66953875a170cfff79a3c2f3c79460ed2
by maraeoradeonsi: optimize out the loop in si_get_ps_input_cntl
Use a remap table from a semantic to an index instead of searching for the correct index.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>
|
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
Commit
2c5c55e72aca297263452535e41222477b012065
by eric+margegallium/util: use uint sampler for stencil-reads
Some drivers can't use float-samplers to read integer textures, so let's make sure the stenicil-sampler has the right type.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6512>
|
 | src/gallium/auxiliary/util/u_simple_shaders.c (diff) |
Commit
9005c9cae40b93dee36a57cbf2a2917fd6902235
by eric+margezink: generically handle matrix types
there's a bunch of glsl 1.10 tests for this
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6268>
|
 | src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c (diff) |
 | src/gallium/drivers/zink/nir_to_spirv/spirv_builder.c (diff) |
 | src/gallium/drivers/zink/nir_to_spirv/spirv_builder.h (diff) |
Commit
c897cd02785bec45596d1c43b906bb4a2e9b06a6
by eric+margeintel/compiler: Handle all indirect lowering choices in brw_nir.c
Since everything flows through NIR and we're doing all of our indirect deref lowering there now, there's no reason to keep making those decisions in brw_compiler and stuffing them in the GLSL compiler structs.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5909>
|
 | src/intel/compiler/brw_compiler.c (diff) |
 | src/intel/compiler/brw_nir.c (diff) |
Commit
38a83a30484c5d7dfcdce3c41d71373c09d42668
by eric+margenir/lower_indirect_derefs: Add a threshold
Instead of always lowering everything, we add a threshold such that if the total indirected array size (AoA size) is above that threshold, it won't lower. It's assumed that the driver will sort things out somehow by, for instance, lowering to scratch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5909>
|
 | src/compiler/nir/nir.h (diff) |
 | src/compiler/nir/nir_lower_indirect_derefs.c (diff) |
 | src/freedreno/vulkan/tu_shader.c (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c (diff) |
 | src/gallium/drivers/freedreno/a2xx/ir2_nir.c (diff) |
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
 | src/intel/compiler/brw_nir.c (diff) |
Commit
a7a0315d7fdaa0e3e698de2af043776e5da467ff
by eric+margeintel/nir: Stop using nir_lower_vars_to_scratch
Instead, we do a limited indirect deref lowering and then use nir_lower_vars_to_explicit_types and nir_lower_explicit_io to lower it as if it were SSBO or global memory access. Among other things, this should enable pointer arithmetic on local variables. Fun!
The only shader-db change from this change on ICL was a few tiny cycle count changes in 7 Aztec Ruins compute shaders.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5909>
|
 | src/intel/compiler/brw_nir.c (diff) |
Commit
9414cbc13c964b567a15637eaa7dc32899391594
by eric+margenir: Don't bail too early in lower_mem_constant_vars
If there were no constant variables, we would bail out entirely. However, we may still have constant input pointers coming in from the client.
Fixes: 4360a8a2b3fce "nir/lower_io: Add support for nir_var_mem_constant" Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/nir/nir_lower_io.c (diff) |
Commit
bcfeead5f31d29ae6ba3e78ce5186c0481d235b5
by eric+margeclover: Call nir_lower_mem_constant_vars
Fixes: 26a4c8f375e "clover/nir: Use nir_var_mem_constant for..." Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/gallium/frontends/clover/nir/invocation.cpp (diff) |
Commit
938d6ceb8300b194a7cbaf640e2c899cbecc6c5a
by eric+margespirv: Don't accept CPacked decoration on struct members
CPacked decoration is only allowed on struct definitions, not struct members.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/spirv/spirv_to_nir.c (diff) |
Commit
d0c2958f882a9644d98d61c49f3b8a842ea2c48f
by eric+margespirv: Propagate packed information to glsl_type
We need to parse the CPacked decoration early enough to apply it when calculating field offsets and creating the struct type.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/spirv/spirv_to_nir.c (diff) |
Commit
be68de81abb3cf2d6944c4c5273c453a61437208
by eric+margeglsl: Propagate packed info in get_explicit_type_for_size_align()
Right now, when calling get_explicit_type_for_size_align() on a packed struct, the packed attribute is lost and field offsets are wrong.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/glsl_types.cpp (diff) |
Commit
42f97f8ce3a9c119ccf960c5cad399f18114e924
by eric+margenir/glsl: Consider block interfaces as structs when it comes to size/align calculation
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/nir_types.cpp (diff) |
Commit
3be890a3a6844292177b5524bd94b6c88fb5fb6e
by eric+margenir: Expose the packed attribute attached to glsl_type objects
This should help code calculating field offsets to get it right when the structure is marked packed.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/nir_types.cpp (diff) |
 | src/compiler/nir_types.h (diff) |
Commit
ca11b17b7b796db7077ed166ba2e33e77ec7088c
by eric+margecompiler/types: Make booleans 32-bit for cl_size/align
OpenCL doesn't mandate a size and this is consistent with the rest of the glsl_type system. While we're here, we also clean ::cl_size() up a bit and use a new explicit_type_scalar_byte_size() helper.
Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/glsl_types.cpp (diff) |
Commit
a0b82c24b6d08cc3f07b4ddad16c7e1b986ad983
by eric+margenir/glsl: Add an explicit_alignment field to glsl_type
When creating explicit type, the alignment information is lost, thus forcing explicit type users to recalculate the alignment using the same size_align() function. Let's add a new field to cache this information.
Only structs, matrices, and vectors have and explicit alignment. Arrays alignment is implicitly set to its element alignment and matrices are required to have an alignment that matches that of its vector columns. the concept of alignment simply doesn't apply to other types.
We make the strategic choice to not allow explicit alignments on scalars. This is for a couple of reasons:
1. There are no cases today where we use explicit types where we want any other alignment for scalars than natural alignment.
2. Vectors don't have a component alignment that's separate from the explicit_alignment so it's impossible to get an explicitly aligned scalar type which is the component of the explicitly aligned vector type.
This choice may cause problems if we ever want to use explicitly laid out types for things like varyings where we sometimes want vec4 alignment of scalars. We can deal with that when the time comes.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/glsl_types.cpp (diff) |
 | src/compiler/glsl_types.h (diff) |
 | src/compiler/nir_types.cpp (diff) |
 | src/compiler/nir_types.h (diff) |
Commit
878a8daca6bfc856308dda7d265964d93feb05ae
by eric+margenir: Add alignment information to cast derefs
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/nir/nir_clone.c (diff) |
 | src/compiler/nir/nir_instr_set.c (diff) |
 | src/compiler/nir/nir.h (diff) |
 | src/compiler/nir/nir_serialize.c (diff) |
 | src/compiler/nir/nir_validate.c (diff) |
Commit
0654a9e82307b854824fc1092a8b79632a2703c0
by eric+margenir: Handle all array stride cases in nir_deref_instr_array_stride
This renames it to drop the ptr_as and makes it handle all of the stride cases. There's a bit of a tricky bit in here around Booleans but we currently use 32-bit for those always.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/nir/nir_lower_io.c (diff) |
 | src/compiler/nir/nir_repair_ssa.c (diff) |
 | src/compiler/nir/nir_to_lcssa.c (diff) |
 | src/compiler/nir/nir.h (diff) |
 | src/compiler/nir/nir_deref.c (diff) |
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
 | src/compiler/nir/nir_opt_load_store_vectorize.c (diff) |
Commit
480329cf8b319983ee96f2b57bd2648be19e5570
by eric+margenir: Add a helper for getting the alignment of a deref
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/nir/nir_lower_io.c (diff) |
 | src/compiler/nir/nir.h (diff) |
Commit
beefd37021edd707274625def137bed0df6fb65f
by eric+margenir/lower_io: Apply alignments from derefs when available
If the deref has no explicit alignment in the chain, we assume component alignment which is what we currently assume for all derefs today. This should be correct for all APIs in the sense that we can usually assume at least component alignment. However, for some APIs such as OpenCL, we could potentially make larger alignment assumptions. The intention is that those will be handled via alignment-increasing casts.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/nir/nir_lower_io.c (diff) |
Commit
99bb2a4de66fa662fb4bcb29df8e2749972ee986
by eric+margenir/opt_deref: Don't remove casts with alignment information
Generally, if a cast has alignment information, that information is useful and we don't want to loose it.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/nir/nir_deref.c (diff) |
Commit
e7fbec0e090be3e796f7a38819fb99bbc1744787
by eric+margenir/opt_deref: Remove restrictive alignment information from casts
If we have a cast deref with alignment information and we can get equal or better alignment information from something further up the deref chain, we can strip the alignment information from the cast and allow other optimizations to potentially eliminate the cast.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/nir/nir_deref.c (diff) |
Commit
207b462e9326b4e7aab8e3c4aead7ca23147e527
by eric+margespirv: Add pointer helper vars to OpCopyMemory
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/spirv/vtn_variables.c (diff) |
Commit
3135984ad0bde072b25e1641e2a9e154fb62a087
by eric+margespirv: Propagate alignments to deref chains via casts
This commit propagates the alignment information provided either through the Alignment decoration on pointers or via the alignment mem operands to OpLoad, OpStore, and OpCopyMemory to the NIR deref chain. It does so by wrapping the deref in a cast. NIR should be able to clean up most unnecessary casts only leaving us with the useful alignment information.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/spirv/vtn_variables.c (diff) |
 | src/compiler/nir/nir_builder.h (diff) |
Commit
3719b69dfc496cdacfe857e1a42984c435eb8a6c
by eric+margenir: Allow var_mem_global in nir_lower_vars_to_explicit_types
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/nir/nir_lower_io.c (diff) |
Commit
9641f483e94a18e5eba5f6d251aa75af8660454e
by eric+margenir: Allow uniform in nir_lower_vars_to_explicit_types
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/nir/nir_lower_io.c (diff) |
Commit
8bea5aaa149a349af55552f47dc248a327ea7929
by eric+margeclover: Use args.size() to compute new var locations
This is better than using num_uniforms as it guarantees what we want: a mapping from nir_variable to the args vector.
Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/gallium/frontends/clover/nir/invocation.cpp (diff) |
Commit
e1ed5a12c5161cbd06d7a4a4897432a0f7690ffa
by eric+margespirv: Stop counting inputs in entry_point_wrapper
nir_shader::num_inputs isn't supposed to be a count of how many input variables we have. It's a size of the lowered input space.
Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/spirv/spirv_to_nir.c (diff) |
Commit
796d3fe9e0f628fd57a68dc0448ba1a182ca5725
by eric+margeclover/nir: Use lower_vars_to_explicit for uniform and global
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/gallium/frontends/clover/nir/invocation.cpp (diff) |
Commit
c7dec0548af8374328fe459d25838d50790e629e
by eric+margespirv: Drop the OpenCL type layout code
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/compiler/spirv/spirv_to_nir.c (diff) |
Commit
21fbffc5425e7ee2912285737ef68398bb156732
by eric+margeanv: Set alignments on UBO/SSBO root derefs
This doesn't really do anything for us today. One day, I suppose we could use it to do something with wide loads with non-uniform offsets. The big reason to do this is to get better testing to make sure that NIR doesn't blow up on the deref paths.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>
|
 | src/intel/vulkan/anv_nir_apply_pipeline_layout.c (diff) |
 | src/intel/vulkan/anv_device.c (diff) |
 | src/intel/vulkan/anv_private.h (diff) |
Commit
fdadbdb513ebb71f9bb4e2784acc24148ca0defb
by eric+margeradv: remove descriptor_indexing fails from expected fails
I think these should be fixed since https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6451. They also pass for me on polaris and navi.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6586>
|
 | .gitlab-ci/deqp-radv-navi14-aco-fails.txt (diff) |
 | .gitlab-ci/deqp-radv-polaris10-aco-fails.txt (diff) |
 | .gitlab-ci/deqp-radv-navi10-aco-fails.txt (diff) |
 | .gitlab-ci/deqp-radv-fiji-aco-fails.txt (diff) |
 | .gitlab-ci/deqp-radv-raven-aco-fails.txt (diff) |
 | .gitlab-ci/deqp-radv-vega10-aco-fails.txt (diff) |
 | .gitlab-ci/deqp-radv-pitcairn-aco-fails.txt (diff) |
Commit
dc79152be975f69235a20a268b68e54a68562649
by eric+margeaco: fix mad splitting after applying output modifiers
Previously, this wasn't done because the mad label wasn't passed to the new definition.
fossil-db (Navi): Totals from 5770 (4.24% of 135946) affected shaders: SGPRs: 391920 -> 391872 (-0.01%) VGPRs: 349084 -> 348424 (-0.19%); split: -0.20%, +0.01% CodeSize: 34639636 -> 34637496 (-0.01%); split: -0.02%, +0.01% MaxWaves: 58828 -> 58862 (+0.06%) Instrs: 6723436 -> 6723297 (-0.00%); split: -0.02%, +0.02% Cycles: 197594168 -> 197591968 (-0.00%); split: -0.02%, +0.02%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6293>
|
 | src/amd/compiler/aco_optimizer.cpp (diff) |
Commit
a99ae1943d880702c8472ea9be11e4f92b6a440f
by eric+margeaco: remove omod_success/clamp_success
This simplifies the optimizer and should make SDWA optimizations easier.
No fossil-db changes on Navi.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6293>
|
 | src/amd/compiler/aco_optimizer.cpp (diff) |
Commit
f18fc34c4d56d6e7d511002b39a257e18d8b3af3
by eric+margeradv: Fix various non-critical integer overflows
The result of 0xf << 28 is a signed integer and hence overflows into the sign bit. In practice compilers did the right thing here, since the intent of the code was unsigned arithmetic anyway.
These conditions were observed in: * dEQP-VK.pipeline.image.suballocation.sampling_type.combined.view_type.1d.format.r4g4b4a4_unorm_pack16.count_8.size.512x1 * dEQP-VK.binding_model.descriptorset_random.sets32.noarray.ubolimitlow.sbolimitlow.sampledimglow.outimgonly.noiub.nouab.frag.ialimithigh.0
Cc: mesa-stable Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6568>
|
 | src/amd/vulkan/radv_shader_args.c (diff) |
 | src/amd/vulkan/radv_pipeline.c (diff) |
 | src/amd/vulkan/radv_shader_info.c (diff) |
Commit
2182bbf84f0f19846a47f0438ec702f4d862731e
by eric+margeaco: Fix integer overflows when emitting parallel copies during RA
32-bit shifts were accidentally used before this change despite the intended output being 64 bits.
This was observed when compiling Dolphin's ubershaders.
Cc: mesa-stable Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6568>
|
 | src/amd/compiler/aco_register_allocation.cpp (diff) |
Commit
93c8777ace8453f4cbc879d0829e582cf151066f
by eric+margeamd/common: Fix various non-critical integer overflows
The result of 0xf << 28 is a signed integer and hence overflows into the sign bit. In practice compilers did the right thing here, since the intent of the code was unsigned arithmetic anyway.
Cc: mesa-stable Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6568>
|
 | src/amd/common/ac_shader_util.c (diff) |
Commit
b7787ce18dfe3f04e5d6a7a0858d56702eb9563c
by ericci/bare-metal: Use re.search() instead re.match() for our line matching.
match() looks for the start of the line to match our regex, while search just looks for the regex anywhere in the line. I messed this up when converting our greps in shell to python, which was part of breaking the POWER_GOOD flake detection. Most of our matches worked, but let's consistently use this one so we don't mess this up in the future.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6529>
|
 | .gitlab-ci/bare-metal/cros_servo_run.py (diff) |
Commit
ff42b7e8041dc09363cbfd4c54533ff280505cd0
by ericci/bare-metal: Fix detection of "POWER_GOOD not seen in time" fails
We were only reading from the CPU serial, not EC, so we'd never notice these sources of job timeouts. I couldn't find a cleaner solution, so I spawned two threads to do the blocking reads from our serial line fifos and merge them together in a single queue to read.
Closes: #3470 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6529>
|
 | .gitlab-ci/bare-metal/cros_servo_run.py (diff) |
Commit
785d3cace47f15bae3f848954c03b9a82daf1074
by ericci/bare-metal: Include a timestamp in our serial reads.
gitlab CI doesn't include timestamps in its logs by default, but it's really useful for finding delays in our CI so stuff one in on the lines coming in from serial and being output to the gitlab log. The artifacts file is still the raw serial output.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6529>
|
 | .gitlab-ci/bare-metal/serial_buffer.py (diff) |
Commit
24f5f11719713e0027c655f5f189299af6d1da35
by ericci/bare-metal: Log why our run restarts when it does.
It would be confusing to see a job quietly restart itself in the middle.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6529>
|
 | .gitlab-ci/bare-metal/cros_servo_run.py (diff) |
Commit
0453a46f668e194d23269510c135a806c7114120
by ericci/bare-metal: Fix capturing of serial output as job artifacts.
I tried to put them in the wrong directory -- everything needs to go in results/, which we want clean and ready before we start our job.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6529>
|
 | .gitlab-ci/bare-metal/cros-servo.sh (diff) |
 | .gitlab-ci/bare-metal/cros_servo_run.py (diff) |
Commit
fd2ee49b2169c318627225bf74c645f7a3b71900
by ericci/bare-metal: Use python for handling fastboot booting and parsing
Modeling after what I did for cros_servo_run.py, this gives us easy support for restarting the test run a530 when we detect a spontaneous reboot. I had to touch up serial_buffer.py to handle buffering in from a file instead of a serial device, to support the upcoming etnaviv CI (tested by running it against a serial log from db410c and seeing it step to calling "fastboot")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6529>
|
 | .gitlab-ci/bare-metal/serial_buffer.py (diff) |
 | .gitlab-ci/bare-metal/fastboot.sh (diff) |
 | .gitlab-ci/bare-metal/fastboot_run.py |
Commit
3cf6325e724dbc20076629983dd1fed5ecac533a
by eric+margeiris: Fix aux assertion in resource_get_handle
iris_resource_get_handle currently asserts that the resource has an aux state that is suitable for sharing. However, the caller of this function can pass a flag to specify that it will handle flushing/resolving the resource as needed for sharing. Take this flag into account when asserting the state of the aux buffer.
Fixes: e81392868e6 ("iris/resource: Drop redundant checks for aux support") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/128 Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1371>
|
 | src/gallium/drivers/iris/iris_resource.c (diff) |
Commit
bb80ed88737ce51023fe073f2401b8574d4d2496
by vleepanfrost: Fix gnu-empty-initializer errors.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3473 Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6551>
|
 | src/gallium/drivers/panfrost/pan_assemble.c (diff) |
 | src/panfrost/lib/gen_pack.py (diff) |
 | src/gallium/drivers/panfrost/pan_resource.c (diff) |
 | src/gallium/drivers/panfrost/pan_cmdstream.c (diff) |
Commit
ebf2576862ca29b1173e3b7fee0cc03acbb4d7ef
by eric+margeradv,aco: disable opts if VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT
Sounds useful to determine if ACO breaks a specific pipeline because of various optimizations.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6487>
|
 | src/amd/compiler/aco_interface.cpp (diff) |
 | src/amd/vulkan/radv_shader.h (diff) |
 | src/amd/vulkan/radv_shader.c (diff) |
 | src/amd/vulkan/radv_pipeline.c (diff) |
Commit
0f4d09443eba0c5a219c943940ff970f3d583f56
by eric+margemeson: drop leftover PTHREAD_SETAFFINITY_IN_NP_HEADER
55765f80 replaced this with a check for the header itself.
Fixes: 55765f80b9ce7cce4ec6 ("util/u_thread: include pthread_np.h if found") Signed-off-by: Eric Engestrom <eric@engestrom.ch> Reviewed-by: Jonathan Gray <jsg@jsg.id.au> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6548>
|
 | meson.build (diff) |
Commit
aaa492e6c6a75ff910788cadfda453ad70a15a3f
by eric+margenir: fix const-cast warning on MSVC
We're casting pointers to const memory to const pointers. MSVC complains about this with the following warning:
warning C4090: 'initializing': different 'const' qualifiers
In this case, we can easily use both constnesses, because all we do is read here. So let's avoid the warning by adding another const-keyword.
Fixes: 193765e26ba ("nir/lower_goto_if: Sort blocks in select_fork") Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6582>
|
 | src/compiler/nir/nir_lower_goto_ifs.c (diff) |
Commit
7acc7ec33b3900c645503a1df5d031057ed7dc6b
by eric+margeac/llvm: fix unaligned VS input loads on gfx10.3
Fixes: a23802bcb9a
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6595>
|
 | src/amd/llvm/ac_llvm_build.c (diff) |
Commit
ab079260572262163be5dfc96b5d47f3fb8c7128
by eric+margeintel: add INTEL_DEBUG=shaders
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6559>
|
 | src/intel/dev/gen_debug.c (diff) |
Commit
663c4d53771a1b00ed49acb08768fd0c01cb9b8e
by eric+margeintel/fs: add hint how to get more info when shader validation fails
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6559>
|
 | src/intel/compiler/brw_fs_generator.cpp (diff) |
Commit
8faf85f68770ee3e060bb74c87e857070f336a02
by eric+margeaco: fix byte_align_scalar for 3 dword vectors
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Fixes: fe08f0ccf94a7315bded5868b4f6a8bae744de79 ('aco: add byte_align_scalar() & trim_subdword_vector() helper functions')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4710>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
91a8a07a5f0ffdd9eb85634fc9c0cb13812210b2
by eric+margenir/load_store_vectorize: rework alignment calculation
It now also updates align_offset and creates better alignment information with a constant 0 offset.
shader-db (Navi): Totals from 63 (0.05% of 127638) affected shaders: SGPRs: 3072 -> 3064 (-0.26%) VGPRs: 2736 -> 2740 (+0.15%) CodeSize: 325180 -> 324336 (-0.26%); split: -0.27%, +0.01% Instrs: 63555 -> 63413 (-0.22%); split: -0.24%, +0.02%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4710>
|
 | src/compiler/nir/tests/load_store_vectorizer_tests.cpp (diff) |
 | src/compiler/nir/nir_opt_load_store_vectorize.c (diff) |
Commit
c6f721966205a1ec52b0461d54dea2da8db969e7
by eric+margenir/load_store_vectorizer: Use more imm helpers in the tests.
It's a lot more readable this way, I think.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4710>
|
 | src/compiler/nir/tests/load_store_vectorizer_tests.cpp (diff) |
Commit
a083560b09cfc3799c1c34112c0b28e29a104f5f
by eric+margenir/load_store_vectorizer: Add unit tests for alignment handling.
The alignment upgrading logic is pretty tricky, but this gives me good confidence that it actually works.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4710>
|
 | src/compiler/nir/tests/load_store_vectorizer_tests.cpp (diff) |
Commit
73eb24ab31a4d6e167ae8e8394f9f26f7c7d5c59
by eric+margeaco: handle unaligned loads on GFX10.3
Same as GFX10.
Cc: 20.2 mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6594>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
e7908a95f9643c377df0d0f9021e509b3e4a2fe8
by eric+margeiris: Fold a condition into no_gpu for consistency
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6192>
|
 | src/gallium/drivers/iris/iris_resource.c (diff) |
Commit
2982d7c63b6c605ca4309925bda35dc13a198a83
by eric+margeiris: Make iris_has_color_unresolved more generic
Replace iris_has_color_unresolved with iris_has_invalid_primary.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6192>
|
 | src/gallium/drivers/iris/iris_resolve.c (diff) |
 | src/gallium/drivers/iris/iris_resource.h (diff) |
 | src/gallium/drivers/iris/iris_resource.c (diff) |
Commit
5b82d8ce8bc681905a8902902fb89151ca32d6c9
by eric+margeiris: Avoid resolving Z/S reads in transfer_map
Resolves are destructive for depth and stencil surfaces, so avoid resolving them for reads.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6192>
|
 | src/gallium/drivers/iris/iris_resource.c (diff) |
|
 | src/gallium/drivers/iris/iris_resource.c (diff) |
Commit
efd439e0d648c90ae5854a0e83cd864836864e91
by eric+margeiris: Better determine map_would_stall for Z/S
Use iris_has_invalid_primary to determine if mapping a depth or stencil surface would lead to a stall due to resolving.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6192>
|
 | src/gallium/drivers/iris/iris_resource.c (diff) |
Commit
ac55b1a9a6266b5badfee82d81302ffc38faeb42
by eric+margenir: get ffma support from NIR options for nir_lower_flrp
This also fixes the inverted last parameter of nir_lower_flrp in most drivers.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6599>
|
 | .gitlab-ci/traces-radeonsi.yml (diff) |
 | src/compiler/nir/nir_lower_flrp.c (diff) |
 | src/gallium/drivers/vc4/vc4_program.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/panfrost/bifrost/bifrost_compile.c (diff) |
 | src/amd/vulkan/radv_shader.c (diff) |
 | src/gallium/frontends/vallium/val_pipeline.c (diff) |
 | src/freedreno/ir3/ir3_nir.c (diff) |
 | src/compiler/nir/nir.h (diff) |
 | src/intel/compiler/brw_nir.c (diff) |
 | src/mesa/state_tracker/st_glsl_to_nir.cpp (diff) |
 | src/panfrost/midgard/midgard_compile.c (diff) |
 | src/broadcom/compiler/nir_to_vir.c (diff) |
 | src/gallium/drivers/r600/r600_shader.c (diff) |
Commit
00b28a50b2c492eee25ef3f75538aabe1e569ff1
by eric+margenir/algebraic: trivially enable existing 32-bit patterns for all bit sizes
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6599>
|
 | src/compiler/nir/nir_opt_algebraic.py (diff) |
Commit
a7ece63de99aeaf4d0dcc808854522f536a0ead9
by eric+margenir/algebraic: add 16-bit versions of a few 32-bit patterns
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6599>
|
 | src/compiler/nir/nir_opt_algebraic.py (diff) |
Commit
0dda2094066efd035bf852e6bdbc349c009c95d2
by eric+margeintel/compiler: match brw_compile_* declarations with their definitions
Current state confuses Eclipse CDT's code analysis.
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6602>
|
 | src/intel/compiler/brw_compiler.h (diff) |
Commit
d4c6e3f196fb61939b0b6c9d1051ac1e35625d42
by eric+margeintel/compiler: use the same name for nir shaders in brw_compile_* functions
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6602>
|
 | src/intel/compiler/brw_vec4_gs_visitor.cpp (diff) |
 | src/intel/compiler/brw_compiler.h (diff) |
 | src/intel/compiler/brw_vec4.cpp (diff) |
 | src/intel/compiler/brw_fs.cpp (diff) |
Commit
e5f735a986576a7634dfb8fed23c969bf4260f45
by eric+margeintel/compiler: move extern C functions out of namespace brw
brw_compile_gs and brw_compile_tcs are extern C functions, but are defined inside of brw namespace, which somehow works but confuses Eclipse CDT's code analysis.
Move these functions out of brw namespace and fix references to objects from brw namespace.
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6602>
|
 | src/intel/compiler/brw_vec4_gs_visitor.cpp (diff) |
 | src/intel/compiler/brw_vec4_tcs.cpp (diff) |
Commit
95ce619680d9d24c82451fa3098177fd63e32b5f
by eric+margeintel/compiler: print dispatch width when shader fails to compile
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6602>
|
 | src/intel/compiler/brw_fs.cpp (diff) |
Commit
64b0b7c274c321b44e58ff0f48b444c3799c0833
by eric+margeintel/compiler: fix typo in a comment
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6602>
|
 | src/intel/compiler/brw_fs.cpp (diff) |
|
 | src/gallium/auxiliary/gallivm/lp_bld_init.c (diff) |
Commit
50ff8a772ae3f8d836f251ab10faabdff3a3c315
by eric+margefreedreno/regs: add 7nm DSI PHY/PLL regs
This is for the kernel driver.
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6603>
|
 | src/freedreno/registers/dsi/dsi.xml (diff) |
Commit
11fbd9806dd99d7a18081ca0d09e4db977f8af1b
by eric+margecompiler/types: Fix deserializing structs with >= 15 members
This was a typo in a0b82c24b6d08c where we used the wrong struct member to decide whether or not to read the explicit_alignment.
Fixes: a0b82c24b6d08c "nir/glsl: Add an explicit_alignment field to glsl_type" Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3487 Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6605>
|
 | src/compiler/glsl_types.cpp (diff) |
Commit
57fba85da408dd4ec98508b5106c156d616b5602
by eric+margespirv: fix emitting switch cases that directly jump to the merge block
As shown in the valid SPIR-V below, if one switch case statement directly jumps to the merge block, it has no branches at all and we have to reset the fall variable. Otherwise, it creates an unintentional fallthrough.
OpSelectionMerge %97 None OpSwitch %96 %97 1 %99 2 %100 %100 = OpLabel %102 = OpAccessChain %_ptr_StorageBuffer_v4float %86 %uint_0 %uint_37 %103 = OpLoad %v4float %102 %104 = OpBitcast %v4uint %103 %105 = OpCompositeExtract %uint %104 0 %106 = OpShiftLeftLogical %uint %105 %uint_1 OpBranch %97 %99 = OpLabel OpBranch %97 %97 = OpLabel %107 = OpPhi %uint %uint_4 %75 %uint_5 %99 %106 %100
This fixes serious corruption in Horizon Zero Dawn.
v2: Changed the code to skip the entire if-block instead of resetting the fallthrough variable.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3460 Cc: mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6590>
|
 | src/compiler/spirv/vtn_cfg.c (diff) |
Commit
4b7f93b4079b56b5af2d3bf557cbdcd148c0233c
by maraeoglsl_to_nir: fix crashes with int16 shifts
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6613>
|
 | src/compiler/glsl/glsl_to_nir.cpp (diff) |
Commit
42420730d1cc88c5b4f1518365e9c273d7d4a120
by eric+margeegl/x11: Free memory allocated for reply structures on error
This patch fixes memory leaks when reply is allocated and is not freed on error execution path.
Found by enabling address sanitizer on simple EGL app.
```c
int main() { EGLDisplay display = eglGetDisplay(EGL_DEFAULT_DISPLAY); EGLint major; EGLint minor;
if (!eglInitialize(display, &major, &minor)) { return 1; } eglTerminate(display); return 0; } ```
Compiled with: `gcc testme.c -o testme -fsanitize=address -lasan -lEGL`
Execution environment: - Windows 10, VMWare Player 15.5.2 build-15785246 without 3D accelaration - Guest OS: OpenSUSE Leap 15.2 - Mesa 19.3.4
Program output:
```sh ASAN_OPTIONS=fast_unwind_on_malloc=0 ./testme
libEGL warning: DRI2: failed to authenticate ==52510==ERROR: LeakSanitizer: detected memory leaks
Direct leak of 32 byte(s) in 1 object(s) allocated from: #0 0x7fa62315f500 in malloc (/usr/lib64/libasan.so.4+0xdc500) #1 0x7fa61e12d86b (/usr/lib64/libxcb.so.1+0xf86b) #2 0x7fa61e12b5c7 (/usr/lib64/libxcb.so.1+0xd5c7) #3 0x7fa61e12cc3e (/usr/lib64/libxcb.so.1+0xec3e) #4 0x7fa61e12cd4f in xcb_wait_for_reply (/usr/lib64/libxcb.so.1+0xed4f) #5 0x7fa61ebe02a5 (/usr/lib64/libEGL_mesa.so.0+0x202a5) #6 0x7fa61ebdb5ca (/usr/lib64/libEGL_mesa.so.0+0x1b5ca) #7 0x7fa61ebd750c (/usr/lib64/libEGL_mesa.so.0+0x1750c) #8 0x7fa61ebd7554 (/usr/lib64/libEGL_mesa.so.0+0x17554) #9 0x7fa61ebd1107 (/usr/lib64/libEGL_mesa.so.0+0x11107) #10 0x400856 in main (/home/user/testme+0x400856) #11 0x7fa622ad8349 in __libc_start_main (/lib64/libc.so.6+0x24349) #12 0x4006e9 in _start (/home/user/testme+0x4006e9)
SUMMARY: AddressSanitizer: 32 byte(s) leaked in 1 allocation(s). ```
Signed-off-by: Andrey Vostrikov <av.linux.dev@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Eric Engestrom <eric@engestrom.ch> Cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6611>
|
 | src/egl/drivers/dri2/platform_x11.c (diff) |
Commit
1476bea7648fd3dd682fd502861dc60fdc95e27b
by eric+margeradeonsi: remove redundant no-signed-zero-fp-math LLVM attribute
Already set by AC_FLOAT_MODE_DEFAULT_OPENGL.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>
|
 | src/gallium/drivers/radeonsi/si_shader_llvm.c (diff) |
Commit
a407123789e13338f3ce24fb2961da8f753a9b1e
by eric+margeradeonsi: move nir_shader_compiler_options into si_screen
so that they can be different depending on the GPU (for 16-bit support)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>
|
 | src/gallium/drivers/radeonsi/si_get.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.h (diff) |
Commit
f85294207f808c8f3072d63ac9e8624f9594045c
by eric+margeRevert "ac: generate FMA for inexact instructions for radeonsi"
This reverts commit 4b9370cb0f3a2d9030e827f847f66bdefeaf08fd.
Fixes: 4b9370cb0f3a2d9030e827f847f66bdefeaf08fd Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3429
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>
|
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
 | src/amd/llvm/ac_llvm_helper.cpp (diff) |
 | src/amd/llvm/ac_llvm_util.h (diff) |
 | .gitlab-ci/traces-radeonsi.yml (diff) |
|
 | src/amd/llvm/ac_llvm_build.h (diff) |
|
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
|
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
|
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
|
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
|
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
Commit
ca74603b4f6ed61141ba7c24488f64138859a532
by eric+margeac/llvm: add better code for isign
There are 2 improvements: - select v_med3_i32 - support vectors
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>
|
 | src/amd/llvm/ac_llvm_build.c (diff) |
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
 | src/amd/llvm/ac_llvm_build.h (diff) |
Commit
d9a77f9ca36177c3295036588f204a9e49e81a09
by eric+margeac/llvm: add better code for fsign
There are 2 improvements: - better code for 16, 32, and 64 bits - vector support for 16 and 32 bits
Totals: SGPRS: 2639738 -> 2625882 (-0.52 %) VGPRS: 1534120 -> 1533916 (-0.01 %) Spilled SGPRs: 3541 -> 3557 (0.45 %) Spilled VGPRs: 33 -> 33 (0.00 %) Private memory VGPRs: 256 -> 256 (0.00 %) Scratch size: 292 -> 292 (0.00 %) dwords per thread Code Size: 55640332 -> 55384892 (-0.46 %) bytes Max Waves: 964785 -> 964857 (0.01 %)
Totals from affected shaders: SGPRS: 377352 -> 363496 (-3.67 %) VGPRS: 209800 -> 209596 (-0.10 %) Spilled SGPRs: 1979 -> 1995 (0.81 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memory VGPRs: 256 -> 256 (0.00 %) Scratch size: 256 -> 256 (0.00 %) dwords per thread Code Size: 12549300 -> 12293860 (-2.04 %) bytes Max Waves: 105762 -> 105834 (0.07 %)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>
|
 | src/amd/llvm/ac_llvm_build.c (diff) |
 | src/amd/llvm/ac_llvm_util.h (diff) |
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
 | src/amd/llvm/ac_llvm_build.h (diff) |
 | src/amd/llvm/ac_llvm_helper.cpp (diff) |
|
 | src/amd/llvm/ac_llvm_build.h (diff) |
 | src/amd/llvm/ac_llvm_build.c (diff) |
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
Commit
fb42d73a9d9c49043e15fe747a3376dad663c9b1
by issor.oruamandroid: amd/registers: switch to new generated register definitions
Android building rules are aligned to meson ones
Fixes the following building error:
FAILED: ninja: 'external/mesa/src/amd/registers/amdgfxregs.json', needed by 'out/target/product/x86_64/gen/STATIC_LIBRARIES/libmesa_amd_common_intermediates/common/sid_tables.h', missing and no known rule to make it
Fixes: b7a6333ee ("amd/registers: switch to new generated register definitions") Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6618>
|
 | src/amd/Android.common.mk (diff) |
Commit
be2818387dd5007667d427e3d7b8f738f5fc59d4
by issor.oruamandroid: util: fix missing include path
Fixes the following building error:
external/mesa/src/util/format/u_format_bptc.c:28:10: fatal error: 'u_format_pack.h' file not found ^~~~~~~~~~~~~~~~~ 1 error generated.
Fixes: 8d38b2578 ("util: Explicitly call the unpack functions from inside bptc pack/unpack.") Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6619>
|
 | src/util/Android.mk (diff) |
Commit
c638301b42bc6ea1a623c2a53646047197fb8030
by eric+margeradeonsi: fix syncobj wait timeout
syncobj wait takes absolute timeout value.
Fixes: 162502370c7 "winsys/amdgpu: implement sync_file import/export" Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6579>
|
 | src/gallium/winsys/amdgpu/drm/amdgpu_cs.c (diff) |
Commit
3d5bed0e883217242a4357116399f60486580170
by eric+margeradeonsi: fix user fence space when MCBP is enabled
When MCBP is enabled, IB maybe preempted which will also update the preempted fence field of the user fence. So we need to reserve enough space for each user fence.
Fixes: 89d2dac5548 "radeonsi: enable preemption if the kernel enabled it" Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6577>
|
 | src/gallium/winsys/amdgpu/drm/amdgpu_cs.c (diff) |
Commit
d85392952b783ba1c83569df76f8091cd261f43a
by tomeu.vizosoci: Run deqp-gles3 and deqp-gles31 on RadeonSI
Only a fourth of the GLES3 tests and a fifth of the GLES31 tests for now, as the machine is quite slow and there's a problem with dEQP calling fesetround all the time and that being very expensive on x86_64.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6580>
|
 | .gitlab-ci/lava-gitlab-ci.yml (diff) |
Commit
be31398d2246b3efb4891f5be0005438812df1db
by eric+margeandroid: nv50/ir: Add nv50_ir_prog_info_out serialize and deserialize
Fixes the following building errors:
ld.lld: error: undefined symbol: nv50_ir_prog_info_serialize >>> referenced by nvc0_program.c:647 (external/mesa/src/gallium/drivers/nouveau/nvc0/nvc0_program.c:647) >>> nvc0_program.o:(nvc0_program_translate) in archive out/target/product/x86_64/obj/STATIC_LIBRARIES/libmesa_pipe_nouveau_intermediates/libmesa_pipe_nouveau.a
ld.lld: error: undefined symbol: nv50_ir_prog_info_out_deserialize >>> referenced by nvc0_program.c:656 (external/mesa/src/gallium/drivers/nouveau/nvc0/nvc0_program.c:656) >>> nvc0_program.o:(nvc0_program_translate) in archive out/target/product/x86_64/obj/STATIC_LIBRARIES/libmesa_pipe_nouveau_intermediates/libmesa_pipe_nouveau.a
ld.lld: error: undefined symbol: nv50_ir_prog_info_out_serialize >>> referenced by nvc0_program.c:674 (external/mesa/src/gallium/drivers/nouveau/nvc0/nvc0_program.c:674) >>> nvc0_program.o:(nvc0_program_translate) in archive out/target/product/x86_64/obj/STATIC_LIBRARIES/libmesa_pipe_nouveau_intermediates/libmesa_pipe_nouveau.a
Fixes: f20a210dc ("nv50/ir: Add nv50_ir_prog_info_out serialize and deserialize") Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6627>
|
 | src/gallium/drivers/nouveau/Makefile.sources (diff) |
Commit
afa1fba198f44b904efe6dddb323679c105dcfdf
by eric+margevulkan/device_select: don't pick a cpu driver as the default
This should stop apps using vallium by accident, when there are better options.
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6552>
|
 | src/vulkan/device-select-layer/device_select_layer.c (diff) |
 | src/vulkan/device-select-layer/device_select.h (diff) |
Commit
82d2d73e03eb851a6de4e8d9528d46a1c9374f4a
by pellouxamd/llvm: switch to 3-spaces style
Follow-up of !4319 using the same clang-format config.
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5310>
|
 | src/amd/llvm/ac_llvm_build.c (diff) |
 | src/amd/llvm/ac_llvm_cull.c (diff) |
 | src/amd/llvm/ac_llvm_helper.cpp (diff) |
 | src/amd/llvm/ac_llvm_util.h (diff) |
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
 | src/amd/llvm/ac_llvm_build.h (diff) |
 | src/amd/llvm/ac_llvm_cull.h (diff) |
 | src/amd/llvm/ac_llvm_util.c (diff) |
 | src/amd/llvm/ac_nir_to_llvm.h (diff) |
 | src/amd/llvm/ac_shader_abi.h (diff) |
Commit
e5fb9dca2a15c57d8216e0fc2260a200df3049e9
by pellouxamd/common: switch to 3-spaces style
Follow-up of !4319 using the same clang-format config.
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5310>
|
 | src/amd/common/ac_binary.h (diff) |
 | src/amd/common/sid.h (diff) |
 | src/amd/common/ac_binary.c (diff) |
 | src/amd/common/ac_rtld.c (diff) |
 | src/amd/common/ac_gpu_info.h (diff) |
 | src/amd/common/ac_shader_util.c (diff) |
 | src/amd/common/amd_family.h (diff) |
 | src/amd/common/amd_kernel_code_t.h (diff) |
 | src/amd/common/ac_debug.h (diff) |
 | src/amd/common/ac_debug.c (diff) |
 | src/amd/common/ac_gpu_info.c (diff) |
 | src/amd/common/ac_exp_param.h (diff) |
 | src/amd/common/gfx10_format_table.h (diff) |
 | src/amd/common/ac_shadowed_regs.c (diff) |
 | src/amd/common/ac_rtld.h (diff) |
 | src/amd/common/ac_surface.h (diff) |
 | src/amd/common/ac_shader_args.h (diff) |
 | src/amd/common/ac_shadowed_regs.h (diff) |
 | src/amd/common/.editorconfig |
 | src/amd/common/ac_surface.c (diff) |
 | src/amd/common/ac_shader_args.c (diff) |
 | src/amd/common/ac_shader_util.h (diff) |
Commit
927a395f040143175535f613ee50d53a73455a52
by jan.zielinskiswr: Fix crashes on non-AVX hardware
Compilers may use vector instructions in calculating hash values of std::string. This happens usualy when high optimalization level is enabled. SWR had two static std::map<std::string, T> variables which lead to crashes on non-AVX systems during the initialization of those variables. This commit makes those variables dynamically allocated and fixes this AVX instruction leak.
Closes: #3077 Closes: #198 Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6565>
|
 | src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp (diff) |
Commit
4c5f5d238b953baab5a3017f76c0b0cb322fea9a
by eric+margelima/ppir: Skip instruction merge when having more than one successor
ppir_do_one_node_to_instr merges instructions and uses a pipeline reg to save a reg. It tests if ppir_node_has_single_src_succ, but it should check if ppir_node_has_single_succ.
The following deqp tests run into this issue because they have a node with 2 successors in different blocks, where one was merged into the same instruction and the second one is pointing to a missing predecessor then.
Fixes the following deqp tests: dEQP-GLES2.functional.shaders.loops.do_while_dynamic_iterations.vector_counter_fragment dEQP-GLES2.functional.shaders.loops.for_dynamic_iterations.vector_counter_fragment dEQP-GLES2.functional.shaders.loops.while_dynamic_iterations.vector_counter_fragment
Reviewed-by: Erico Nunes <nunes.erico@gmail.com> Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6555>
|
 | src/gallium/drivers/lima/ir/pp/node_to_instr.c (diff) |
Commit
46bb051bc2a911d8177521b59cd1f81330be123a
by eric+margeradeonsi: stop using TGSI_PROPERTY_NEXT_SHADER
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
Commit
a37d897d692ed58724751c4b35d7a8a9fbcbfc3c
by eric+margeradeonsi: stop using TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION / VS_BLIT_SGPRS_AMD
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_vs.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_state.c (diff) |
 | src/gallium/drivers/radeonsi/gfx10_shader_ngg.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_viewport.c (diff) |
Commit
af59f06918bba54929efd20475a438da49413873
by eric+margeradeonsi: stop using TGSI_PROPERTY_TCS_VERTICES_OUT
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_tess.c (diff) |
Commit
34b8e60cb8696016573f8c77a1ede5020e7b8254
by eric+margeradeonsi: stop using TGSI_PROPERTY_TES_POINT_MODE / TES_PRIM_MODE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/gfx10_shader_ngg.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_tess.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
Commit
eeea2f52c7d50bf3126e05513b01d60c847f7288
by eric+margeradeonsi: stop using TGSI_PROPERTY_TES_SPACING
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
a8e7024792533c5e7c4f8362329914f314d9e8e4
by eric+margeradeonsi: stop using TGSI_PROPERTY_TES_VERTEX_ORDER_CW
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
|
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_compute.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm.c (diff) |
Commit
5aeaf3d7bcea2dbd6e19a861b27d7861f26a87f3
by eric+margeradeonsi: stop using TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_state.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
Commit
c597e394d45f2025a98e445649e4949ce515a2fc
by eric+margeradeonsi: stop using TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
ce0291df4ac9b17b513f46456d6046772b74649a
by eric+margeradeonsi: stop using TGSI_PROPERTY_FS_COORD_PIXEL_CENTER
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
ebe8238f1b64c4b7897108ca11a9b3f89e85bbd7
by eric+margeradeonsi: stop using TGSI_PROPERTY_FS_DEPTH_LAYOUT
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
89cf8789cd19fa504838240f39ea1f45ca6f2ad2
by eric+margeradeonsi: stop using TGSI_PROPERTY_CS_LOCAL_SIZE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_compute.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm.c (diff) |
Commit
cb7bc983ae57f3f0586b9a047d705b263da63cf3
by eric+margeradeonsi: stop using TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.h (diff) |
Commit
cb63e4afc9621ad12e5e8f13972554056067f997
by eric+margeradeonsi: remove info::samplers_declared, image_buffers, msaa_images_declared
They are redundant with shader_info.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_debug.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_descriptors.c (diff) |
 | src/gallium/drivers/radeonsi/si_compute.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
c1af2f4bee1f517aff6d84df703c4f2821d562d9
by eric+margeradeonsi: remove redundant si_shader_info::shader_buffers_declared
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_compute.c (diff) |
 | src/gallium/drivers/radeonsi/si_debug.c (diff) |
 | src/gallium/drivers/radeonsi/si_compute_prim_discard.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_resources.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
Commit
0dabcb9e53f4fd388cbc1af396131a3b77e432f9
by eric+margeradeonsi: remove redundant si_shader_info::images_declared
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
 | src/gallium/drivers/radeonsi/si_compute.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_debug.c (diff) |
 | src/gallium/drivers/radeonsi/si_descriptors.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
Commit
d15a7d16d6aaf0977081f816f97ca09ae49fd364
by eric+margeradeonsi: remove redundant si_shader_info::const_buffers_declared
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_shader_llvm_resources.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_compute_prim_discard.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_debug.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
Commit
f02cd0e0270dd4d0532c9fe74b42dee8d6c2eaa4
by eric+margeradeonsi: remove redundant si_shader_info:*(clip|cull)* fields
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_state.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
Commit
7b3e24c2d874206080da93f72cc82c44954df798
by eric+margeradeonsi: remove unused si_shader_info::uses_(vertexid|basevertex)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
Commit
8df349a31ec8aeed3ac890f36e5f48e173831a9f
by eric+margeradeonsi: merge uses_persp_opcode_interp_sample/uses_linear_opcode_interp_sample
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
99c4e610840f62e39e96d71bdabe6fd166bbebc9
by eric+margeradeonsi: remove redundant si_shader_info::uses_kill
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
Commit
c8ab5899c1b9c9a184a0c27545f19c7dce405924
by eric+margeradeonsi: reduce type sizes in si_shader_selector
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
Commit
83cdffd4358a50957ddd49d777c4deb81b841dbb
by eric+margeradeonsi: rename num_memory_instructions -> num_memory_stores
it only counts stores
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
Commit
7960668dc95999c1eaa8a8bd12fd8d860bbf5780
by eric+margeradeonsi: remove redundant si_shader_info::writes_memory
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_state.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_gs.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
2b4fa6880890215d64b94954e122aba866734241
by eric+margeradeonsi: remove redundant GS variables in si_shader_selector
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/gfx10_shader_ngg.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_gs.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
Commit
f3f08bca23858d42ee3bc3683b25ab32ff9433e1
by eric+margeradeonsi: remove redundant si_shader_selector::max_gs_stream
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
Commit
757f790ad84caaff9e9d6e4f98a8c5587e153b27
by eric+margeradeonsi: remove redundant si_shader_info::uses_derivatives
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
1dd243d4f507914a4e458cc2de7deff435a12d91
by eric+margeradeonsi: use shader_info::cs::local_size_variable to clean up some code
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
|
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_compute.c (diff) |
Commit
234505162c11ff52d775c536667ccbdd260bf6c1
by eric+margeradeonsi: deduplicate setting key.mono.u.vs_export_prim_id
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6620>
|
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
Commit
c56fbed99b4aeb22cec19dc83d75aba79f9fe696
by eric+margeradeonsi: kill point size VS output if it's not used by the rasterizer
Fixed-func shaders can contain the output, because their generator doesn't consider the current primitive type into account.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6620>
|
 | src/gallium/drivers/radeonsi/si_shader_llvm_vs.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_state.c (diff) |
 | src/gallium/drivers/radeonsi/si_state.h (diff) |
Commit
2c94a9788e79e5b5ea17c581ab49bc4c2aaf9a0c
by eric+margeswr: fix build with mingw
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com> Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com> Cc: mesa-stable
closes #3454
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6532>
|
 | src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp (diff) |
 | src/gallium/drivers/swr/rasterizer/common/swr_assert.h (diff) |
 | src/gallium/drivers/swr/rasterizer/core/tessellator.cpp (diff) |
 | src/gallium/auxiliary/tessellator/tessellator.cpp (diff) |
 | src/gallium/drivers/swr/rasterizer/core/threads.cpp (diff) |
 | src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp (diff) |
 | src/gallium/drivers/swr/rasterizer/common/os.cpp (diff) |
 | src/gallium/drivers/swr/meson.build (diff) |
 | src/gallium/drivers/swr/rasterizer/jitter/jit_pch.hpp (diff) |
 | src/gallium/drivers/swr/rasterizer/common/os.h (diff) |
 | src/gallium/drivers/swr/rasterizer/common/swr_assert.cpp (diff) |
 | src/gallium/drivers/swr/rasterizer/memory/Convert.h (diff) |
|
 | src/compiler/spirv/spirv_to_nir.c (diff) |
Commit
013a2b123d75ed53af603e23a8f6fd0d6e3b5490
by eric+margespirv2nir: Rework argument handling
The argument handling of this little tool was pretty rubbish. It had no help and it required the filename to come first which is just strange. This reworks it and makes things much nicer. It's still rubbish but at least there's a chance people can figure out how to use it now.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6607>
|
 | src/compiler/spirv/spirv2nir.c (diff) |
Commit
11bd64bdecd8d00261319759767eecae68405ab1
by eric+margeci: Remove any existing results directory before running piglit
A pre-existing results directory (from a previous job) could cause a spurious failure, see e.g. https://gitlab.freedesktop.org/mesa/mesa/-/jobs/4410206
Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6601>
|
 | .gitlab-ci/piglit/run.sh (diff) |
Commit
bd428162b6ddba9ce1e1f22f5e4a55478d6520cf
by eric+margenir/lower_io: Fix the unknown-array-index case in get_deref_align
The current align_mul calculation in the unknown-array-index calculation is
align_mul = MIN3(parent_mul, min_pow2_divisor(parent_offset), min_pow2_divisor(stride))
which is certainly correct if parent_offset > 0. However, when parent_offset = 0, min_pow2_divisor(parent_offset) isn't well-defined and our calculation for it is 1 << -1 which isn't well-defined. That said.... it's not actually needed.
The offset to the base of the array is
array_base = parent_mul * k + parent_offset
for some integer k. When we throw in an unknown array index i, we get
elem = parent_mul * k + parent_offset + stride * i.
If we set new_align = MIN2(parent_mul, min_pow2_divisor(stride)), then both parent_mul and stride are divisible by new_align and
elem = (parent_mul / new_alig) * new_align * k + (stride / new_align) * new_align * i + parent_offset
= new_align * ((parent_mul / new_alig) * k + (stride / new_align) * i) + parent_offset
so elem = new_align * j + parent_offset where
j = (parent_mul / new_alig) * k + (stride / new_align) * i.
That's a very long-winded way of saying that we can delete one parameter from the align_mul calculation and it's still fine. :-)
Fixes: 480329cf8b31 "nir: Add a helper for getting the alignment of a deref" Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> Tested-by: Alejandro Piñeiro <apinheiro@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6628>
|
 | src/compiler/nir/nir_lower_io.c (diff) |
Commit
e4d75c22beba5533b499f7f8f8be6ab0a110ecbc
by eric+margenir/opt_shrink_vectors: shrink image stores using the format
fossil-db (Navi): Totals from 657 (0.48% of 135946) affected shaders: VGPRs: 26076 -> 25520 (-2.13%); split: -2.15%, +0.02% CodeSize: 3033016 -> 3014472 (-0.61%); split: -0.64%, +0.03% MaxWaves: 9386 -> 9420 (+0.36%) Instrs: 590109 -> 585502 (-0.78%); split: -0.82%, +0.04%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5772>
|
 | src/compiler/nir/nir_opt_shrink_vectors.c (diff) |
Commit
9b3491870fcf76028a2eef42a95e35a4732a5bd4
by eric+margeradeonsi: Work around Wasteland 2 bug.
Confirmed by an user on AMD HW that this driconf flag works around the issue.
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1535 CC: mesa-stable Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6637>
|
 | src/util/00-mesa-defaults.conf (diff) |
Commit
cc86a13b36e19a393820f325f5f6b2f47e371b12
by eric+margeandroid: freedreno: Implement pipe screen's get_device/driver_uuid()
libfreedreno_common static dependency is need for gallium_dri target
Fixes the following building error:
ld.lld: error: undefined symbol: fd_get_device_uuid >>> referenced by freedreno_screen.c:836 (external/mesa/src/gallium/drivers/freedreno/freedreno_screen.c:836) >>> freedreno_screen.o:(fd_screen_get_device_uuid) in archive out/target/product/x86_64/obj/STATIC_LIBRARIES/libmesa_pipe_freedreno_intermediates/libmesa_pipe_freedreno.a
ld.lld: error: undefined symbol: fd_get_driver_uuid >>> referenced by freedreno_screen.c:842 (external/mesa/src/gallium/drivers/freedreno/freedreno_screen.c:842) >>> freedreno_screen.o:(fd_screen_get_driver_uuid) in archive out/target/product/x86_64/obj/STATIC_LIBRARIES/libmesa_pipe_freedreno_intermediates/libmesa_pipe_freedreno.a
Fixes: e3c39e505 "freedreno: Implement pipe screen's get_device/driver_uuid()" Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Acked-by: Rob Clark <robdclark@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6625>
|
 | src/gallium/targets/dri/Android.mk (diff) |
Commit
9d02d65f4643bd4885c40ca2fca4e1e8f7cc202e
by eric+margeandroid: freedreno/common: add libmesa_git_sha1 static dependency
Fixes the following building error:
external/mesa/src/freedreno/common/freedreno_uuid.c:30:10: fatal error: 'git_sha1.h' file not found ^~~~~~~~~~~~ 1 error generated.
Fixes: e7458f19e ("freedreno/uuid: Generate meaningful device and driver UUID") Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Acked-by: Rob Clark <robdclark@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6625>
|
 | src/freedreno/Android.common.mk (diff) |
Commit
bb42deee362c8dcdeca2212567aba945cd3f4116
by issor.oruamegl/android: HAVE_DRM_GRALLOC path fixes (v2)
Fixes the following building errors:
external/mesa/src/egl/drivers/dri2/platform_android.c:1001:9: error: use of undeclared identifier 'dri2_img' dri2_img); ^ external/mesa/src/egl/drivers/dri2/platform_android.c:1059:17: error: incompatible pointer types assigning to '__DRIimage *' (aka 'struct __DRIimageRec *') from '_EGLImage *' (aka 'struct _egl_image *') [-Werror,-Wincompatible-pointer-types] dri_image = droid_create_image_from_name(disp, buf); ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 2 errors generated.
(v2) Changelog: - Pass NULL instead of dri_image as argument of createImageFromName() - Delete the unused dri_image variable
Fixes: 5c8b67ed ("egl/android: Simplify droid_create_image_from_name() path") Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6626>
|
 | src/egl/drivers/dri2/platform_android.c (diff) |
Commit
331e5f105eb42862e10f39ea5d702dd55139b887
by eric+margemesa: refactor floating point texture fbo completeness check on gles
Patch introduces a helper function for checking the completeness and fixes some of the existing checking in is_format_color_renderable. This is done as preparation for EXT_color_buffer_half_float support.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6491>
|
 | src/mesa/main/fbobject.c (diff) |
Commit
8447b0f6518aad56b802470dc61920fef3699852
by eric+margemesa: add EXT_color_buffer_half_float plumbing
Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6491>
|
 | src/mesa/main/fbobject.c (diff) |
 | src/mesa/main/mtypes.h (diff) |
 | src/mesa/main/extensions_table.h (diff) |
Commit
171e94fe629011a7282c81f5777603752058169e
by eric+margemesa/st: enable EXT_color_buffer_half_float when formats supported
Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6491>
|
 | .gitlab-ci.yml (diff) |
 | .gitlab-ci/deqp-panfrost-t860-fails.txt (diff) |
 | src/mesa/state_tracker/st_extensions.c (diff) |
 | .gitlab-ci/piglit/quick_gl.txt (diff) |
 | docs/features.txt (diff) |
Commit
dd471928c94e31d103ac94d397122ff42d20b983
by alexandros.frantzistracie: Make tests independent of environment
Provide some sensible values for required environment variables to allow tests to run properly in any environment.
Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6598>
|
 | .gitlab-ci/tracie-runner-gl.sh (diff) |
 | .gitlab-ci/tracie/tests/test.py (diff) |
Commit
d24ffd870615f0918c19c35b428251ba86bb49d7
by alexandros.frantzistracie: Produce JUnit XML results
Write tracie results to the 'results/junit.xml' file using the JUnit XML format. Among other uses, this file can be picked up by gitlab to display more useful information to the user.
Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6598>
|
 | .gitlab-ci/tracie/tests/test.py (diff) |
 | .gitlab-ci/tracie/tracie.py (diff) |
Commit
7e82e252e0f00879d0f15bbf37da23b49628f867
by alexandros.frantzisgitlab-ci: Enable unit test reports for normal runner traces jobs
Inform gitlab about the JUnit XML file that tracie produces, so that the pipeline page can present more detailed information about tracie test results.
Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6598>
|
 | .gitlab-ci.yml (diff) |
Commit
88fc3e24d3c0d907f234ed9063d4bb6d5e944fb3
by alexandros.frantzisgitlab-ci: Enable unit test reports for lava traces jobs
Download from minio the JUnit XML file that tracie produces and inform gitlab about it, so that the pipeline page can present more detailed information about tracie test results.
Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6598>
|
 | .gitlab-ci/lava-gitlab-ci.yml (diff) |
Commit
f4210df2241556873032f741be4a4a44337ebf99
by alexandros.frantzisgitlab-ci: Enable unit test report for arm64_a630_traces
Inform gitlab about the JUnit XML file that tracie produces, so that the pipeline page can present more detailed information about tracie test results.
Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6598>
|
 | .gitlab-ci.yml (diff) |
Commit
0e9425a1b74ed7e38656eee43f72a527404bf0b6
by eric+margeaco: fix one-off error in Operand(uint16_t)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Fixes: 3d6f67950d9 ('aco: improve 8/16-bit constants') Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6583>
|
 | src/amd/compiler/aco_ir.h (diff) |
Commit
6049dc1a9d5cb1a3dae063e52409028213d5492a
by eric+margeaco: improve fsign selection
Idea from https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284
fossil-db (Navi): Totals from 4053 (2.95% of 137413) affected shaders: SGPRs: 305810 -> 305906 (+0.03%); split: -0.01%, +0.04% VGPRs: 249000 -> 249144 (+0.06%); split: -0.01%, +0.07% CodeSize: 29967092 -> 29885768 (-0.27%); split: -0.27%, +0.00% Instrs: 5749494 -> 5737971 (-0.20%); split: -0.20%, +0.00% Cycles: 255028584 -> 254955444 (-0.03%); split: -0.04%, +0.01%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6583>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
28df8ffde7cf9a53e1ce6cf13e6b495fb4865295
by jan.zielinskiswr: Use ElemenCount constructor for LLVM 11
In LLVM 12 ElementCount constructor is private and instead of using it explicitly, ::get function should be used, but in LLVM 11, the constructor is still the way to go.
Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com> Closes: #3490 Fixes: 639605e5ba947bb947313a6584ef7fbb8619e9c2 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6648>
|
 | src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp (diff) |
 | src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp (diff) |
Commit
5b310562575bdb3b2a90f94decc2663fcef3c1a9
by eric+margeaco/isel: refactor code and remove unnecessary v_mov
Changes mainly due to avoided v_movs for fmin/fmax/fadd/fmul.
Totals from 12783 (9.36% of 136546) affected shaders (RAVEN): SGPRs: 1097752 -> 1098264 (+0.05%); split: -0.09%, +0.14% VGPRs: 856920 -> 850800 (-0.71%); split: -0.82%, +0.11% SpillSGPRs: 49494 -> 49496 (+0.00%); split: -0.00%, +0.01% CodeSize: 99997916 -> 99989948 (-0.01%); split: -0.04%, +0.03% MaxWaves: 53895 -> 54448 (+1.03%) Instrs: 19634960 -> 19632626 (-0.01%); split: -0.05%, +0.04% Cycles: 1620601696 -> 1620900712 (+0.02%); split: -0.02%, +0.04% VMEM: 3334181 -> 3299626 (-1.04%); split: +1.62%, -2.66% SMEM: 865573 -> 865876 (+0.04%); split: +0.84%, -0.81% VClause: 337100 -> 335224 (-0.56%); split: -0.88%, +0.32% SClause: 696813 -> 697267 (+0.07%); split: -0.14%, +0.21% Copies: 1549897 -> 1548023 (-0.12%); split: -0.52%, +0.40% Branches: 682118 -> 682108 (-0.00%); split: -0.01%, +0.00% PreSGPRs: 893524 -> 895129 (+0.18%); split: -0.00%, +0.18% PreVGPRs: 790180 -> 783036 (-0.90%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6635>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
0b6448bbe791474a152d53bfaf750408807ac166
by eric+margeaco/isel: refactor emit_vop3a_instruction() to handle 2 operand instructions
Only AC:O has been affected.
Totals from 4 (0.00% of 136546) affected shaders (RAVEN): CodeSize: 16428 -> 16420 (-0.05%) Instrs: 3294 -> 3292 (-0.06%) Cycles: 14208 -> 14200 (-0.06%) VMEM: 936 -> 978 (+4.49%) VClause: 80 -> 77 (-3.75%) Copies: 211 -> 209 (-0.95%) PreVGPRs: 127 -> 126 (-0.79%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6635>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
5c445be39a15719c63c25d1ad9b7bf9c6a0999d2
by eric+margeradeonsi: set outputs_written_before_ps for geometry shaders too
it will be used in following commit
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6634>
|
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
Commit
fc44861517c3278305ba78fc3b6dade2fa4514bf
by eric+margeradeonsi: eliminate unused shader outputs for separate NGG geometry shaders
This just works because the same output export code is used for VS too.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6634>
|
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
Commit
e7d606289c648969f3a13d98d4852b4090469bb8
by eric+margeradeonsi: remove swizzle == ~0 dead code in si_llvm_load_input_gs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6623>
|
 | src/gallium/drivers/radeonsi/si_shader_llvm_gs.c (diff) |
Commit
9fc96152741607c28aafaaa6c333a7d7281d2820
by eric+margeac,radeonsi: lower 64-bit IO to 32 bits and remove all dead code
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6623>
|
 | src/gallium/drivers/radeonsi/si_shader_llvm_tess.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_gs.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_internal.h (diff) |
|
 | src/gallium/drivers/radeonsi/si_shader_llvm_ps.c (diff) |
Commit
3a9356831a962997e37589c7a04e12aaa85a99e3
by eric+margenir: Update the comment about nir_lower_uniforms_to_ubo()'s multiplier.
I remembered doing this analysis and was arguing in another MR that this pass didn't have any driver dependency, but it actually does based on PIPE_CAP_PACKED_UNIFORMS.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6359>
|
 | src/compiler/nir/nir_lower_uniforms_to_ubo.c (diff) |
Commit
f3b33a5a35e605101d45213bddf52f2f800a52bb
by eric+margenir: Add a range_base+range to nir_intrinsic_load_ubo().
For UBO accesses to be the same performance as classic GL default uniform block uniforms, we need to be able to push them through the same path. On freedreno, we haven't been uploading UBOs as push constants when they're used for indirect array access, because we don't know what range of the UBO is needed for an access.
I believe we won't be able to calculate the range in general in spirv given casts that can happen, so we define a [0, ~0] range to be "We don't know anything". We use that at the moment for all UBO loads except for nir_lower_uniforms_to_ubo, where we now avoid losing the range information that default uniform block loads come with.
In a departure from other NIR intrinsics with a "base", I didn't make the base an be something you have to add to the src[1] offset. This keeps us from needing to modify all drivers (particularly since the base+offset thing can mean needing to do addition in the backend), makes backend tracking of ranges easy, and makes the range calculations in load_store_vectorizer reasonable. However, this could definitely cause some confusion for people used to the normal NIR base.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6359>
|
 | src/gallium/auxiliary/nir/tgsi_to_nir.c (diff) |
 | src/compiler/nir/nir_lower_uniforms_to_ubo.c (diff) |
 | src/compiler/nir/nir_lower_io.c (diff) |
 | src/compiler/nir/nir_validate.c (diff) |
 | src/compiler/nir/nir.h (diff) |
 | src/compiler/nir/tests/load_store_vectorizer_tests.cpp (diff) |
 | src/compiler/spirv/vtn_variables.c (diff) |
 | src/intel/vulkan/anv_nir_apply_pipeline_layout.c (diff) |
 | src/compiler/nir/nir_intrinsics.py (diff) |
 | src/compiler/nir/nir_print.c (diff) |
 | src/compiler/nir/nir_opt_load_store_vectorize.c (diff) |
Commit
f74c3b0404c21568ec3621aad28f450c788ebfd4
by eric+margefreedreno/ir3: Use the new NIR UBO ranges in UBO analysis.
Now that NIR doesn't lose the original base/range on the nir_lower_uniforms_to_ubo() path, we get a lot more indirect arrays uploaded in shader-db.
total instructions in shared programs: 8125988 -> 8103788 (-0.27%) total constlen in shared programs: 1313096 -> 1448864 (10.34%) total cat6 in shared programs: 104089 -> 97824 (-6.02%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6359>
|
 | src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c (diff) |
Commit
41b5aafef341f8086be16901c15d4325a3be3359
by eric+margefreedreno/ir3: Apply the max upload limit to initial range setup
There's no sense in planning out an upload that we won't be able to actually upload due to the limit. This means that we can keep making other loads pushable, even after we find one that wouldn't be, and we don't fill the const file with UBO data for a load we couldn't promote.
total instructions in shared programs: 8096655 -> 8044344 (-0.65%) total constlen in shared programs: 1447824 -> 1411384 (-2.52%) total cat6 in shared programs: 97824 -> 89983 (-8.02%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6359>
|
 | src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c (diff) |
Commit
1ed78bd24796b4c08c8451a9223a161f4787e7cf
by eric+margenir: Use explicit deref information to provide real UBO ranges.
freedreno results (note that cat6 is loads from memory as opposed to pushed constants from the constant file):
total instructions in shared programs: 8044344 -> 8022085 (-0.28%) total constlen in shared programs: 1411384 -> 1461964 (3.58%) total cat6 in shared programs: 89983 -> 87065 (-3.24%)
Over the last 3 commits, we increased Manhattan31 performance by ~10%
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6359>
|
 | src/compiler/nir/nir_lower_io.c (diff) |
Commit
6cef8040672e84393e59ed6efa9953c95f5f8c92
by eric+margenir/opt_if: fix opt_if_merge when destination branch has a jump
Fixes a case where opt_if_merge created code like: if (...) { break; loop { ... } } which caused opt_peel_loop_initial_if to complain that the loop pre-header wasn't a predecessor of the loop header. This patch prevents this (invalid, I think) unreachable code from being created.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3496 Fixes: 4d3f6cb9739 ('nir: merge some basic consecutive ifs') Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6633>
|
 | src/compiler/nir/nir_opt_if.c (diff) |
Commit
45bcb1084139b58378551e2d954bd6032db20330
by eric+margenir: Add a dominance validation pass
We don't do full dominance validation of SSA values in nir_validate because it requires generating valid dominance information and, while that's not extremely expensive, it's probably more than we want to do on every pass. Also, dominance information is generated through the metadata system so if we ran it by default in nir_validate, we would get different beavior of the metadata system based on whether or not you have a debug build and metadata bugs would be very hard to find.
However, having a pass for it that can be run occasionally, should help detect and expose bugs. For ease of use, we add a NIR_VALIDATE_SSA_DOMINANCE environment variable which can be set to manually enable dominance validation as a standard part of nir_validate.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5288>
|
 | src/compiler/nir/nir.h (diff) |
 | src/compiler/nir/nir_validate.c (diff) |
Commit
7cedc4128a1f9d8ecae00ff41ccf1b63e4f3ebd0
by eric+margespirv: Run repair_ssa if there are discard instructions
SPIR-V's OpKill is a control-flow instruction but NIR's discard is not. Therefore, it can be valid SPIR-V to have
if (...) { foo = /* something */ } else { discard; } use(foo);
without any phi between the definition of foo and its use. This is not true in NIR, however, because NIR's discard isn't considered control-flow. Arguably, this is a NIR bug but making discard control- flow is a very deep change that can have serious ans subtle side-effects. The easier thing to do is just fix up the SSA in case we have an OpKill which might have gotten us into the above case.
Fixes dEQP-VK.graphicsfuzz.vectors-and-discard-in-function with the new NIR dominance validation pass enabled.
Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5288>
|
 | src/compiler/spirv/vtn_private.h (diff) |
 | src/compiler/spirv/vtn_cfg.c (diff) |
Commit
3bd7c3c9dbde491173d7015e2168fc0f34d95bb8
by eric+margeintel/nir: Call validate_ssa_dominance at both ends of the NIR compile
This invokes it before we go into the optimization/lowering pass and then right before we go out of SSA.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5288>
|
 | src/intel/vulkan/anv_pipeline.c (diff) |
 | src/intel/compiler/brw_nir.c (diff) |
Commit
757de68a436a986b089d98470e03c10bd3f57ad8
by eric+margeaco/isel: Turn the function template emit_load into a proper function
Statically known values were encoded using template parameters previously, causing specializations for each of the 5 sets of template arguments to be generated. Since emit_load is not performance critical (the inner loop never runs more often than twice), it's better for build time to use runtime arguments everywhere.
Reduces build time of this file by 9% (17.3s -> 15.7s on my machine) and reduces libaco's size by 2.6%.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6504>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
dab0af061641bae1a69793ee39cad230725a3203
by eric+margeaco/isel: Simplify nested branching code
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6504>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
150de6358d26bb29968d800e749cd41ae78c9420
by eric+margeaco/isel: Consistently use references for input parameters in emit_load
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6504>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
1eac0b52e3ee0fb230aeb4d5858c8cf6523be58e
by eric+margeaco/isel: Remove unused definitions
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6504>
|
 | src/amd/compiler/aco_instruction_selection_setup.cpp (diff) |
Commit
47de5532836d795cf5f0363eb339385c83fdb00b
by eric+margeaco/isel: Move context initialization code to a dedicated file
aco_instruction_selection_setup.cpp (previously used as a header) has been split into a header and an implementation file. The latter "only" implements init_context and setup_isel_context, but since these files carry a long trail of helper functions, this cleans up the isel header a lot.
Reduces library size by 3.1% due to more functions being compiled with static linkage. Makes aco_instruction_selection.cpp compile 3% faster.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6504>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
 | src/amd/compiler/meson.build (diff) |
 | src/amd/compiler/aco_instruction_selection_setup.cpp (diff) |
 | src/amd/compiler/aco_instruction_selection.h |
Commit
793dc668eaca8756f123e437e38a415977c0fe0f
by eric+margeaco/isel: Move add_startpgm to aco_instruction_selection.cpp
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6504>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
 | src/amd/compiler/aco_instruction_selection.h (diff) |
Commit
fefeaeef0605d60f1e268870a85dd673b07c7a3d
by eric+margeaco/isel: Compile all helper functions with static linkage
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6504>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
4df0eef18898584b6d59efb08ebe83e3cb2cf500
by airliedllvmpipe: include gallivm perf flags in shader cache.
Otherwise if you set perf flags, then don't set them, they won't take affect.
Fixes: 6c0c61cb48e8 ("llvmpipe: add infrastructure for disk cache support") Reviewed-by: Roland Scheidegger <sroland@vmware.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6630>
|
 | src/gallium/auxiliary/gallivm/lp_bld_init.h (diff) |
 | src/gallium/auxiliary/gallivm/lp_bld_init.c (diff) |
 | src/gallium/drivers/llvmpipe/lp_screen.c (diff) |
Commit
cc431f48f90945198782ab3201fd049d294743fc
by eric+margeiris: Add missing range_base/range to our nir_load_ubos.
Fixes: f3b33a5a35e6 ("nir: Add a range_base+range to nir_intrinsic_load_ubo().") Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Tested-by: Clayton Craft <clayton.a.craft@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6654>
|
 | src/gallium/drivers/iris/iris_program.c (diff) |
Commit
cf2eebdf4f1eff4eaad30e6f62e026d8fbbe4ff5
by eric+margeradv,gallium: Add driconf option to reduce advertised VRAM size.
To help debugging games that actually do active memory budget management.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6641>
|
 | src/gallium/frontends/dri/dri_query_renderer.c (diff) |
 | src/amd/vulkan/radv_device.c (diff) |
 | src/gallium/auxiliary/pipe-loader/driinfo_gallium.h (diff) |
 | src/util/driconf.h (diff) |
|
 | docs/features.txt (diff) |
Commit
5857a015b5e0c11dbaaebb802597a50bfc84c7b6
by eric+margepanfrost: Cleanup panfrost_get_param
Move DEPTH_CLIP_DISABLE_SEPARATE back next to DEPTH_CLIP_DISABLE, and remove a dead return statement.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6609>
|
 | src/gallium/drivers/panfrost/pan_screen.c (diff) |
Commit
361396c86682eec03a067141a3dafd4629b36a45
by eric+margepanfrost: Remove old comment on broken depth reload
Depth reload works now, so now the optimisation is just for performance and isn't a workaround any more.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6609>
|
 | src/gallium/drivers/panfrost/pan_resource.c (diff) |
Commit
23ad95227a8b2c8ee390665c71a70685f82f0ef9
by eric+margepanfrost: Correctly set modifier_constant
This fixes the tiled-linear conversion optimisation.
Fixes: 56f9cc99487 ("panfrost: Account for modifiers when creating BO") Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6608>
|
 | src/gallium/drivers/panfrost/pan_resource.c (diff) |
Commit
c35645320592acfb8548b5db4bb3d43cc3608c8a
by eric+margepanfrost: Seperate resource setup and bo creation
This will make it easier to convert between modifiers without unnecessarily creating a new bo.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6608>
|
 | src/gallium/drivers/panfrost/pan_resource.c (diff) |
Commit
a3431ffb693093868417f8813e4954a26464d6f9
by eric+margepanfrost: Move tiled-linear conversion checking to a new function
AFBC-linear conversion will also use this function.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6608>
|
 | src/gallium/drivers/panfrost/pan_resource.c (diff) |
Commit
c0d04cd5bbc638acc32909895c57741a171771b3
by eric+margepanfrost: AFBC to linear layout conversion
Similar to the conversion that is already done for tiled to linear.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6608>
|
 | src/gallium/drivers/panfrost/pan_resource.c (diff) |
Commit
641d45befb49fa009e42da027cda4c28a3a11b7b
by eric+margenir/opt_loop_unroll: fix is_access_out_of_bounds with vectors
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Timothy Arceri <tarceri@itsquueze.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6347>
|
 | src/compiler/nir/nir_opt_loop_unroll.c (diff) |
Commit
36e58a14cc3dd057b2535e43ae87f25663113e52
by eric+margeaco: fix v_writelane_b32 with two sgprs
v_writelane_b32 can take two sgprs but only if one is m0.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Cc: 20.2 <mesa-stable> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6662>
|
 | src/amd/compiler/aco_register_allocation.cpp (diff) |
Commit
29cb3cba9ffde348aaf33576e5cbe974f024685c
by eric+margeaco: workaround disassembler bug of v_writelane_b32 with literal
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6662>
|
 | src/amd/compiler/aco_print_asm.cpp (diff) |
Commit
5a8447cbd40ef29a4225686d4820a8b0a19973ae
by eric+margeaco: don't apply constant to SDWA on GFX8
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Cc: 20.2 <mesa-stable> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6662>
|
 | src/amd/compiler/aco_optimizer.cpp (diff) |
Commit
834b449a46716d64bd2cee99a029cdc48813cc9a
by eric+margeaco: fix value numbering of reductions
Non-ssa definitions caused an assertion in value numbering.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6662>
|
 | src/amd/compiler/aco_reduce_assign.cpp (diff) |
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
 | src/amd/compiler/aco_util.h (diff) |
Commit
e394ff9b5f8da5a9579d0a96c371cec814caf10c
by eric+margeaco: fix validation of sub-dword parallel-copies
Only the operands with a sub-dword definition need to be checked.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6662>
|
 | src/amd/compiler/aco_validate.cpp (diff) |
Commit
bd53a2559271dc618b9ce5cefa3c169d3cf3b650
by eric+margeturnip: delete tu_physical_device path field
Resolves a "strncpy specified bound 20 equals destination size" warning.
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6664>
|
 | src/freedreno/vulkan/tu_private.h (diff) |
 | src/freedreno/vulkan/tu_drm.c (diff) |
|
 | src/freedreno/vulkan/tu_image.c (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
Commit
3b144d5fb855f0dd4d6813a961ab07ecd56fb7f6
by eric+margeturnip: fix the type of tu_shader_module code field, delete unused sha1
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6664>
|
 | src/freedreno/vulkan/tu_private.h (diff) |
 | src/freedreno/vulkan/tu_shader.c (diff) |
|
 | src/freedreno/vulkan/tu_private.h (diff) |
 | src/freedreno/vulkan/tu_cmd_buffer.c (diff) |
Commit
5a95cc04de605a03147c1ee3d5c244cc2417405d
by eric+margeturnip: remove some unnecessary regs init
The removed registers are all set elsewhere when they are relevant, so there is no need to initialize them in init_hw().
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6664>
|
 | src/freedreno/vulkan/tu_cmd_buffer.c (diff) |
|
 | src/freedreno/vulkan/tu_query.c (diff) |
Commit
3b3772d6e694da91ead40c144292f5a93b2aa42e
by eric+margefreedreno: Make the pack struct have a .qword for wide addresses.
Storing a precomputed iova in reg packing wasn't possible because you'd truncate to 32 bits. Making it be .qword makes it possible.
Cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6592>
|
 | src/freedreno/registers/gen_header.py (diff) |
Commit
329c31728773d58ebb0a9c2dd133ed7d6bc710cd
by eric+margeturnip: Fix truncation of CS shader iovas to 32 bits.
This was invalid, and makes VK break consistently with the msm-next-pgtbables branch.
Fixes: 13525a9c706b ("turnip: pipeline program state refactor") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6592>
|
 | src/freedreno/vulkan/tu_pipeline.c (diff) |
Commit
802d3611dcec8102ef75fe2461340c2997af931e
by eric+margeturnip: Fix truncation of iovas to 32 bits in queries.
Fixes regression when switching to msm-next-pgtables.
Fixes: e34b0d65f971 ("turnip: Implement and enable VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6592>
|
 | src/freedreno/vulkan/tu_query.c (diff) |
Commit
b4317fccdd7f873dc7e9a4a1ca06b40bbaf4c2dd
by eric+margeci/bare-metal: Update the kernel to msm-next-pgtables
I'd like to see this new non-UAPI feature bake in CI. More importantly, it may prevent some classes of flakes on cheza by isolating the processes on the GPU so that a fault in one doesn't stomp over memory in another. I've also pulled in a fix that etnaviv needed for their upcoming CI.
We add a few more kernel options while uprevving:
- More interconnect drivers for getting good GPU perf - PRNG so that we don't get late-in-boot complaints about randomness. - db820c's power domains and ethernet so hopefully we can switch to this upstream kernel
This seems to slightly change the flakes happening in bypass mode, so add them to the list.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6592>
|
 | .gitlab-ci/deqp-freedreno-a630-flakes.txt (diff) |
 | .gitlab-ci.yml (diff) |
 | .gitlab-ci/container/baremetal_build.sh (diff) |
 | .gitlab-ci/arm64.config (diff) |
Commit
0f61f0142ac84a3b73eed5b7f414af457f3b3473
by eric+margeci/bare-metal: Allow wget of the kernel/dtb for kernel development.
It's useful for kernel dev to be able throw all of our testing infrastructure at a risky kernel change, but it's expensive (time and bandwidth) to roll new containers every time your rev your kernel. Make it so you can just point the env vars to your personal build you've uploaded.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6592>
|
 | .gitlab-ci/bare-metal/fastboot.sh (diff) |
 | .gitlab-ci/bare-metal/cros-servo.sh (diff) |
Commit
06c6920a5b1046305408089561c4e5f7b90511d5
by eric+margemesa: Fix GL_CLAMP handling in glSamplerParameter
GL_CLAMP is only a thing in compat contexts.
Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Adam Jackson <ajax@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6653>
|
 | src/mesa/main/samplerobj.c (diff) |
Commit
cdc025c9ef67bddf733fccb5b3e78d8d7c8b4880
by eric+margemesa: Generate more errors from GetSamplerParameter
Not all of the corresponding extensions are enabled unconditionally, and we should throw INVALID_ENUM in those cases.
Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Adam Jackson <ajax@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6653>
|
 | src/mesa/main/samplerobj.c (diff) |
Commit
03eec294b90759be48b5c85fda5e54bed683068f
by eric+margest/nir: Call st_glsl_to_nir_post_opts before interface unification
Since 95415a54c007a909f0fb9d1b2567beecbd73d403 st_finalize_nir_before_variants calls to nir_shader_gather_info, so finalization should be moved before interface unification.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3482 Fixes: 95415a54c007a909f0fb9d1b2567beecbd73d403 Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6647>
|
 | src/mesa/state_tracker/st_glsl_to_nir.cpp (diff) |
Commit
7ee5da90edc4cada9f858073fec735b6c18544ec
by eric+margenir_dominance: Use uint32_t instead of int16_t for dominance counters
We're seeing OpenCL kernels that can hit this INT16_MAX block count.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6657>
|
 | src/compiler/nir/nir_dominance.c (diff) |
 | src/compiler/nir/nir.h (diff) |
Commit
a42bf9a29707cf503c56201e90aff2bbc5f685ca
by eric+margegallium/dri2: Report I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS num_planes
Return the expected number of planes in a DMA buffer that has the I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS modifier.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6486>
|
 | src/gallium/frontends/dri/dri2.c (diff) |
Commit
d686835171c44cf325306f6c87408bef999f5496
by eric+margegallium/dri2: Support I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS import
Add support for up to four planes being imported via the I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS modifier. In the four plane scenario, two planes are used for the compressed surface and two planes are used for the compression metadata.
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6486>
|
 | src/gallium/frontends/dri/dri2.c (diff) |
Commit
e15543b71ad07d208f0ec3524c8486329ee882f4
by eric+margeintel/isl: Describe I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6486>
|
 | src/intel/isl/isl.h (diff) |
 | src/intel/isl/isl_drm.c (diff) |
|
 | src/intel/isl/isl_surface_state.c (diff) |
Commit
9efd71466df7706cce21880d5d31c3245654628b
by eric+margeintel/isl: Add YUV format info for the aux-map
* Define ISL equivalents for the P010, P012, and P016 formats. * Add aux-map encodings for the YUV formats iris will soon support.
v2. Replace &&'s with ||'s in isl_format_is_planar() (Lionel)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6486>
|
 | src/intel/isl/isl.c (diff) |
 | src/intel/isl/isl.h (diff) |
 | src/intel/isl/isl_format_layout.csv (diff) |
Commit
c3c99f45718080b66676c2b028015abbafeaee11
by eric+margest/mesa: Don't map all P01X DRM formats to P016
Allow gallium drivers to distinguish between the P010, P012, and P016 DRM formats.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6486>
|
 | src/mesa/state_tracker/st_program.h (diff) |
 | src/mesa/state_tracker/st_atom_texture.c (diff) |
 | src/mesa/state_tracker/st_cb_eglimage.c (diff) |
 | src/util/format/u_format.csv (diff) |
 | src/gallium/frontends/dri/dri_helpers.c (diff) |
 | src/util/format/u_format.h (diff) |
 | src/gallium/include/pipe/p_format.h (diff) |
 | src/mesa/state_tracker/st_atom_sampler.c (diff) |
 | src/mesa/state_tracker/st_sampler_view.c (diff) |
Commit
1ddb1a6cf98bf15112901edd14965f04f6ed9a46
by eric+margeintel/common: Add get_aux_map_format_bits()
Add a function suitable for planar YUV surfaces. For these surfaces, drivers remap each plane to an RGB-formatted surface. Enable drivers to pass the plane index and the original YUV format to get the right aux-map format bits.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6486>
|
 | src/intel/common/gen_aux_map.h (diff) |
 | src/intel/common/gen_aux_map.c (diff) |
Commit
82720852bd6e33ca19c17fff845674f17127ba6a
by eric+margeiris: Support planar resource imports for MC
Support importing and mapping multiple planes of aux data for I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6486>
|
 | src/gallium/drivers/iris/iris_resource.c (diff) |
 | src/gallium/drivers/iris/iris_resource.h (diff) |
|
 | src/intel/common/gen_aux_map.c (diff) |
 | src/intel/common/gen_aux_map.h (diff) |
|
 | src/gallium/drivers/iris/iris_resource.c (diff) |
|
 | src/gallium/drivers/iris/iris_resolve.c (diff) |
 | src/gallium/drivers/iris/iris_resource.c (diff) |
Commit
d86e38af2c6c9e7f70b31fb6482a875c6d10427c
by eric+margenir: More NIR_MAX_VEC_COMPONENTS fixes
A couple of these probably aren't strictly necessary but they won't hurt. The one that's particularly tricky is a fixed-length array in nir_search.h. However, to avoid blowing up the binary size of nir_opt_algebraic by about 2x, we just assert that only small ops are used.
Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6655>
|
 | src/compiler/nir/nir_instr_set.c (diff) |
 | src/compiler/nir/nir_move_vec_src_uses_to_dest.c (diff) |
 | src/compiler/nir/nir_lower_regs_to_ssa.c (diff) |
 | src/compiler/nir/nir_opt_idiv_const.c (diff) |
 | src/compiler/nir/nir_opt_vectorize.c (diff) |
 | src/compiler/nir/nir_opt_if.c (diff) |
 | src/compiler/nir/nir_algebraic.py (diff) |
 | src/compiler/nir/nir_opt_comparison_pre.c (diff) |
 | src/compiler/nir/nir_lower_subgroups.c (diff) |
|
 | src/compiler/nir/nir_opt_idiv_const.c (diff) |
Commit
89401e58672e1251b954662f0f776a6e9bce6df8
by eric+margenir: More NIR_MAX_VEC_COMPONENTS fixes
Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6655>
|
 | src/compiler/nir/nir_builtin_builder.c (diff) |
 | src/compiler/nir/nir_opt_copy_propagate.c (diff) |
 | src/compiler/nir/nir_lower_io.c (diff) |
 | src/compiler/nir/nir_builder.h (diff) |
Commit
a4885d26915d290192f3bb5e5f50355cfa266a59
by eric+margepan/mdg: Fix spilling of non-32-bit types
The source argument for mov has index 1, not 0.
Fixes a vertex shader in SuperTuxKart.
Fixes: b4de9e035ac ("pan/mdg: Mask spills from texture write") Reported-by: macc24 Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>~ Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6659>
|
 | src/panfrost/midgard/midgard_ra.c (diff) |
Commit
587969154f2cca5c9973bdc20693cd548895efbe
by eric+margefreedreno: Fix file descriptor leak.
Fix defects reported by Coverity Scan.
Resource leak (RESOURCE_LEAK) leaked_handle: Handle variable fd going out of scope leaks the handle.
Argument cannot be negative (NEGATIVE_RETURNS) negative_returns: fd is passed to a parameter that cannot be negative.
Fixes: 1ea4ef0d3be8 ("freedreno: slurp in decode tools") Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6642>
|
 | src/freedreno/decode/pgmdump.c (diff) |
Commit
2f61d7c22dae0484d60728e768d917fa28bd59df
by vleesvga: Fix unused printf argument.
Fix defect reported by Coverity Scan.
Extra argument to printf format specifier (PRINTF_ARGS) extra_argument: This argument was not used by the format string: info->num_outputs.
Fixes: ccb4ea5a43e8 ("svga: Add GL4.1(compatibility profile) support in svga driver") Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Neha Bhende <bhenden@vmware.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6644>
|
 | src/gallium/drivers/svga/svga_pipe_streamout.c (diff) |
Commit
0bc36ef50e45baf2255db98ced72986dd0176eca
by eric+margespirv: Initialize spirv_test member shader.
Fix defect reported by Coverity Scan.
Uninitialized pointer field (UNINIT_CTOR) uninit_member: Non-static class member shader is not initialized in this constructor nor in any functions that it calls
Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6640>
|
 | src/compiler/spirv/tests/helpers.h (diff) |
Commit
bd647f8eb691fe2aefcfad04821e880911ae8f17
by eric+margefreedreno: Add another new sysmem flake.
This one blocked a marge merge a few minutes ago.
Fixes: b4317fccdd7f ("ci/bare-metal: Update the kernel to msm-next-pgtables") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6670>
|
 | .gitlab-ci/deqp-freedreno-a630-flakes.txt (diff) |
|
 | src/freedreno/decode/scripts/texturator-to-unit-test.lua (diff) |
Commit
14131ed308188b4b1d0ab08e6479f71e9394d450
by eric+margefreedreno/cffdec: Add support for texturator's 2DMS layout setup.
We can't initialize our MSAA texture with glTexImage2D(), so we have to do a draw to get its slice's layout into the cmdstream.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6589>
|
 | src/freedreno/decode/scripts/texturator-to-unit-test.lua (diff) |
Commit
cd4fb5a434ca145eee3f4374ac1141664d6aa72d
by eric+margefreedreno/fdl: Add layout test for the Android CTS's MSAA mustpass surface.
Rob had a question of if we were laying things out the same as the blob. This doesn't detect any difference in our layout, though.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6589>
|
 | src/freedreno/fdl/fd6_layout_test.c (diff) |
Commit
b0722cb670156ef7d8d1ada4afaf8bf5cd5b9dba
by airliedgallivm: disable brilinear for lod bias and explicit lod.
This allows GL 4.5 CTS to pass in full with no flags, other than that I'm not sure if it's a good or bad idea.
Reviewed-by: Roland Scheidegger <sroland@vmware.com> Cc: mesa-stable@lists.freedesktop.org Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6638>
|
 | .gitlab-ci/deqp-llvmpipe-fails.txt (diff) |
 | .gitlab-ci/piglit/quick_shader.txt (diff) |
 | src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c (diff) |
Commit
97e49b223ca66d918cc595ad3fcad478bc9821b9
by eric+margefreedreno: Fix rast state for multisample clear
a6xx in particular cares about the multisample bit.
Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6649>
|
 | src/gallium/drivers/freedreno/freedreno_blitter.c (diff) |
 | src/gallium/drivers/freedreno/freedreno_context.h (diff) |
 | src/gallium/drivers/freedreno/freedreno_context.c (diff) |
Commit
74f1c50dc3bec39fc78f54265ae8c71369283071
by eric+margefreedreno: Don't bypass fd_draw_vbo() in clear fallback
Otherwise we bypass all the resource-usage tacking.
Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6649>
|
 | src/gallium/drivers/freedreno/freedreno_context.c (diff) |
 | src/gallium/drivers/freedreno/freedreno_blitter.c (diff) |
 | .gitlab-ci/deqp-freedreno-a307-fails.txt (diff) |
 | src/gallium/drivers/freedreno/freedreno_draw.c (diff) |
|
 | src/gallium/drivers/freedreno/a6xx/fd6_gmem.c (diff) |
|
 | src/gallium/drivers/freedreno/a6xx/fd6_draw.c (diff) |
Commit
6e4d0a48e3dad0dbf0515b5391b8d0d52795e0fc
by eric+margefreedreno: Clear gs/tcs/tes state for clear blits
Otherwise we could emit a clear blit that is trying to use some random GS stage, which doesn't go well.
Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6649>
|
 | src/gallium/drivers/freedreno/freedreno_blitter.c (diff) |
Commit
911ce374caf03581038e49cf6edccf8d4953eeda
by eric+margefreedreno/a6xx: Fix MSAA clear
We need to do MSAA clear on the 3d pipe, it seems to not work out properly on 2d pipe (at least for 4x MSAA and heights that are not multiple of 16).
This matches what blob and tu seem to do. Fixes the following with DEQP_CONFIG=rgba8888d24s8ms4
dEQP-GLES31.functional.primitive_bounding_box.depth.builtin_depth.per_primitive_bbox_equal dEQP-GLES31.functional.primitive_bounding_box.depth.builtin_depth.per_primitive_bbox_larger dEQP-GLES31.functional.primitive_bounding_box.depth.user_defined_depth.per_primitive_bbox_equal dEQP-GLES31.functional.primitive_bounding_box.depth.user_defined_depth.per_primitive_bbox_larger
Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6649>
|
 | src/gallium/drivers/freedreno/a6xx/fd6_draw.c (diff) |
|
 | src/util/u_idalloc.h |
 | src/gallium/auxiliary/util/u_idalloc.h |
 | src/util/meson.build (diff) |
 | src/gallium/auxiliary/meson.build (diff) |
 | src/gallium/auxiliary/util/u_idalloc.c |
 | src/util/Makefile.sources (diff) |
 | src/gallium/auxiliary/Makefile.sources (diff) |
 | src/util/u_idalloc.c |
Commit
e808d38299565669105fc95d1b4a469f79b070c5
by pellouxutil/idalloc: add util_idalloc_reserve
Can be used to mark an id as used (if it was reclaimed without using util_idalloc_alloc).
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6600>
|
 | src/util/u_idalloc.h (diff) |
 | src/util/u_idalloc.c (diff) |
Commit
553d3719337f8698cf152d5932e60722a3745d34
by pellouxutil/idalloc: add lowest_free_idx to avoid iterating from 0
lowest_free_idx is a conservative estimation of the lowest index where a free id can be found.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6600>
|
 | src/util/u_idalloc.c (diff) |
 | src/util/u_idalloc.h (diff) |
Commit
34852124db9cbadb0d2a7aef5cbf77e7c5957879
by pellouxmesa: add a isGenName parameter to _mesa_HashInsert
Indicates if the given name has been returned by _mesa_HashFindFreeKeyBlock.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6600>
|
 | src/mesa/main/performance_query.c (diff) |
 | src/mesa/main/atifragshader.c (diff) |
 | src/mesa/main/samplerobj.c (diff) |
 | src/mesa/main/teximage.c (diff) |
 | src/mesa/main/transformfeedback.c (diff) |
 | src/mesa/main/arrayobj.c (diff) |
 | src/mesa/main/pipelineobj.c (diff) |
 | src/mesa/main/fbobject.c (diff) |
 | src/mesa/main/bufferobj.c (diff) |
 | src/mesa/main/dlist.c (diff) |
 | src/mesa/main/texobj.c (diff) |
 | src/mesa/main/arbprogram.c (diff) |
 | src/mesa/main/hash.h (diff) |
 | src/mesa/main/shaderapi.c (diff) |
 | src/mesa/main/externalobjects.c (diff) |
 | src/mesa/main/hash.c (diff) |
 | src/mesa/main/queryobj.c (diff) |
 | src/mesa/main/glthread_varray.c (diff) |
 | src/mesa/main/performance_monitor.c (diff) |
Commit
fefc6d264a12ec7ef999c60eb188719c01bea172
by pellouxmesa: add GL name reuse support
This will allow drivers to adopt the behavior of proprietary drivers that seem to return the lowest available name (while Mesa returns max_seen_name + 1).
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6600>
|
 | src/mesa/main/hash.h (diff) |
 | src/mesa/main/hash.c (diff) |
Commit
60ffadcbc0715ef736a81f5a4c2b5924cd8b04f6
by pellouxmesa: add _mesa_HashFindFreeKeys
_mesa_HashFindFreeKeyBlock function returns a name range, so it cannot be used to recycle non-consecutive names.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6600>
|
 | src/mesa/main/hash.h (diff) |
 | src/mesa/main/hash.c (diff) |
Commit
a56849ddda6a03d86293600c9f2a7ccd1fb3995c
by pellouxmesa: use _mesa_HashFindFreeKeys for GL functions
This allows to implement name reuse if we want to.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6600>
|
 | src/mesa/main/fbobject.c (diff) |
 | src/mesa/main/performance_monitor.c (diff) |
 | src/mesa/main/transformfeedback.c (diff) |
 | src/mesa/main/bufferobj.c (diff) |
 | src/mesa/main/samplerobj.c (diff) |
 | src/mesa/main/arrayobj.c (diff) |
 | src/mesa/main/pipelineobj.c (diff) |
 | src/mesa/main/externalobjects.c (diff) |
 | src/mesa/main/queryobj.c (diff) |
 | src/mesa/main/arbprogram.c (diff) |
 | src/mesa/main/texobj.c (diff) |
Commit
265a3b9624f7b4007954edaadfaee5c46107e9dc
by pellouxdriconf: add option to reuse GL names
Fix apps expecting name recycling. https://gitlab.freedesktop.org/mesa/mesa/-/issues/3144 is an example of such issue, SPECviewperf13 has this problem too.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6600>
|
 | src/mesa/state_tracker/st_extensions.c (diff) |
 | src/util/00-mesa-defaults.conf (diff) |
 | src/gallium/frontends/dri/dri_screen.c (diff) |
 | src/mesa/state_tracker/st_context.c (diff) |
 | src/gallium/auxiliary/pipe-loader/driinfo_gallium.h (diff) |
 | src/mesa/main/mtypes.h (diff) |
 | src/gallium/include/frontend/api.h (diff) |
 | src/util/driconf.h (diff) |
Commit
d3cd24999fd582ae8da52a0499f8db6eebfb503a
by eric+margeanv: fix minor gen_ioctl(I915_PERF_IOCTL_CONFIG) error handling issue
Found by Coverity.
Fixes: 2001a80d4a8 ("anv: Implement VK_KHR_performance_query") Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6667>
|
 | src/intel/vulkan/anv_batch_chain.c (diff) |
Commit
40b964dc8f3b020841dce65ec7075dbdbacc17f1
by eric+margeintel/compiler: remove unused fs_validator::param_size
Found by Coverity as unitialized variable.
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6667>
|
 | src/intel/compiler/brw_fs.h (diff) |
Commit
5ea0b6a9c6063cb017e23212ec3e6d5340801df4
by eric+margeintel/compiler: initialize remaining fields of various classes
These variables seem to be initialized before being used, so this patch is not fixing any bug, but leaving them unitialized may become a bug after some refactoring.
These classes were affected: fs_reg_alloc, fs_visitor, fs_generator, instruction_scheduler.
Found by Coverity.
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6667>
|
 | src/intel/compiler/brw_schedule_instructions.cpp (diff) |
 | src/intel/compiler/brw_fs_visitor.cpp (diff) |
 | src/intel/compiler/brw_fs_reg_allocate.cpp (diff) |
 | src/intel/compiler/brw_fs_generator.cpp (diff) |
Commit
46a82aa3a6044998d17dded35249a562203f6138
by eric+margeintel/tools: fix possible memory leak in the error path
Found by Coverity.
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6667>
|
 | src/intel/tools/i965_disasm.c (diff) |
Commit
5b6fd2a3140fa70a86a65631a20bf39d75e89c0d
by eric+margeintel/tools: handle ftell errors
Found by Coverity, as "argument cannot be negative", referring to fread's 2nd argument.
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6667>
|
 | src/intel/tools/i965_disasm.c (diff) |
Commit
18eb853ac86c116e2a50e560462258fbad33e13e
by eric+margeintel/compiler: quiet Coverity warnings
Coverity complains about possible out-of-bounds write & read, because it thinks that "loc + i" can be bigger than sizes of the 2 used arrays.
It's not obvious from the code it cannot happen, so add asserts here.
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6667>
|
 | src/intel/compiler/brw_fs_nir.cpp (diff) |
Commit
69e65b9cf08f0f594f24810bf8f9ee6c79744743
by eric+margeintel/tools: fix possible randomly increased verbosity of error2aub
Found by Coverity.
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6667>
|
 | src/intel/tools/error2aub.c (diff) |
Commit
52becd39a590cc8cac7bbe38282b27fc0a8ebbbf
by eric+margeturnip: rework vertex buffers draw state handling
This exploits a HW optimization for when only the size of a draw state is changed, to make things simpler and more optimal (assuming a well behaved user which doesn't unecessarily call CmdBindVertexBuffers many times)
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6665>
|
 | src/freedreno/vulkan/tu_cmd_buffer.c (diff) |
 | src/freedreno/vulkan/tu_pipeline.c (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
Commit
2f62a44df0f694791d7c364940841e8682faeefc
by eric+margeci: do not build libdrm for vc4, reedreno and etnaviv
They are using a in source tree version of the needed libdrm functionality or are shipping all needed headers in the source tree.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6672>
|
 | .gitlab-ci/build-libdrm.sh (diff) |
 | .gitlab-ci.yml (diff) |
Commit
77d256279337ae873a85974ce5f60d414f8f45c9
by ajaxwsi/x11: Hook up VK_PRESENT_MODE_FIFO_RELAXED_KHR
This is just PresentOptionAsync.
Fixes: mesa/mesa#3483 Reviewed-by: Michel Dänzer <mdaenzer@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6673>
|
 | docs/relnotes/new_features.txt (diff) |
 | src/vulkan/wsi/wsi_common_x11.c (diff) |
 | src/vulkan/wsi/wsi_common.c (diff) |
Commit
72a0f7496a7347b5a729549662ff9ba1a430b250
by ajaxglx: Use GLX_FUNCTION2 only for actually aliased function names
I find the __glX naming convention distasteful for a bunch of reasons, not least that I expect "vi -t glXBindTexImageEXT" to take me someplace useful. The functions we're referencing here should not be exported from libGL (hence the static / _X_HIDDEN) but that's no reason not to name them correctly.
This does have one possible, very minor, correct functional change, glXGetMscRateOML now returns Bool (unsigned int) instead of GLboolean (unsigned char); if your psABI really only writes to a single byte of the return register when the return type is char-like, then we probably would not have returned false when we meant to. At least for amd64 this does not seem to be an issue; the old code wrote 0 to %eax, the new code does a zero-extended load from %al to %eax (since the internal function still returns GLboolean).
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6671>
|
 | src/glx/glxcmds.c (diff) |
Commit
e648442ceb347c8acd92b23d2a910b185fc81847
by ajaxglx: Collect all the non-applegl extensions in the GetProcAddress table
No functional change, just reducing #ifdef clutter.
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6671>
|
 | src/glx/glxcmds.c (diff) |
Commit
b8239abdf86f251d75567381d0d59976f9d91efd
by ajaxglx: Reject glXSwapIntervalMESA greater than INT_MAX
It wouldn't work in any case, as the internal API only stores a signed int, and GLX_EXT_swap_control_tear will overload the meaning of negative values so we should avoid ambiguity.
If your application needs a swap interval in excess of ~414.25 days, I'm very sorry.
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6671>
|
 | src/glx/glxcmds.c (diff) |
Commit
60ebeb4608a871ba89ba081c1c6e7ebdd5efec9a
by ajaxglx: Implement GLX_EXT_swap_control for DRI2 and DRI3
This is a slight generalization of the existing SGI and MESA swap control extensions, and a prerequisite for GLX_EXT_swap_control_tear.
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6671>
|
 | src/glx/dri3_glx.c (diff) |
 | src/glx/glxextensions.c (diff) |
 | src/glx/glx_pbuffer.c (diff) |
 | docs/relnotes/new_features.txt (diff) |
 | src/glx/dri2_glx.c (diff) |
 | src/glx/glxextensions.h (diff) |
 | src/glx/glxcmds.c (diff) |
Commit
5e9e45738353863672e6d42b52248de9ae4c70bb
by ajaxglx/dri3: Implement GLX_EXT_swap_control_tear
Not wired up for DRI2 because it would require server-side support, which I'm not especially interested in writing.
Fixes: mesa/mesa#96 Reviewed-by: Michel Dänzer <mdaenzer@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6671>
|
 | src/glx/dri3_glx.c (diff) |
 | src/glx/glxcmds.c (diff) |
 | src/glx/glxextensions.c (diff) |
 | docs/relnotes/new_features.txt (diff) |
 | src/glx/glx_pbuffer.c (diff) |
 | src/glx/glxextensions.h (diff) |
 | src/loader/loader_dri3_helper.c (diff) |
Commit
c2ae39e0cea7ce43531c9de2e642ffb3add02ba2
by eric+margenir: add mediump flag to IO semantics
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6621>
|
 | src/compiler/nir/nir.h (diff) |
 | src/compiler/nir/nir_print.c (diff) |
 | src/compiler/nir/nir_lower_io.c (diff) |
Commit
40f7afc1e97e11b65f9975f3c079f44e5357379f
by eric+margenir: fix lower_mediump_outputs to not require variables
If IO is lowered, NIR doesn't have to contain any IO variables (and in fact radeonsi removes them and other drivers should too).
This makes the pass work without variables.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6621>
|
 | src/compiler/nir/nir_lower_mediump_outputs.c (diff) |
Commit
1eff389bd3ee17c340d9047051f559f0ac4e44b5
by eric+margeblorp: Fix alignment test for HIZ_CCS_WT fast-clears
Remove the extra logical ORs in the ternary operation.
Fixes: 5425fcf2cb3 ("intel/blorp: Satisfy HIZ_CCS fast-clear alignments") Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6650>
|
 | src/intel/blorp/blorp_clear.c (diff) |
|
 | src/intel/blorp/blorp_clear.c (diff) |
Commit
3064feb2350d5fce36a09c85a72788998c3f1c1b
by eric+margepan/mdg: Obey f2fmp size restriction in fuse_io_16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6283>
|
 | src/panfrost/midgard/nir_fuse_io_16.c (diff) |
|
 | src/compiler/nir/nir_opt_algebraic.py (diff) |
Commit
26fc5e1f4a844692f2ba2568d6d232881be01e0e
by eric+margenir/algebraic: expand existing 32-bit patterns to all bit sizes using loops
Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6283>
|
 | src/compiler/nir/nir_opt_algebraic.py (diff) |
|
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
 | src/compiler/glsl/glsl_to_nir.cpp (diff) |
 | src/panfrost/util/pan_lower_framebuffer.c (diff) |
 | src/compiler/nir/nir_opcodes.py (diff) |
 | src/compiler/nir/nir_opt_algebraic.py (diff) |
|
 | src/compiler/nir/nir_opcodes.py (diff) |
Commit
cdd498bbe8884a316c58458f6298d0239ce6c556
by eric+margenir: add new mediump opcodes f2[ui]mp, i2fmp, u2fmp
Algebraic optimizations will select them.
Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6283>
|
 | src/compiler/nir/nir_opt_algebraic.py (diff) |
 | src/compiler/nir/nir_opcodes.py (diff) |
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
Commit
b86305bb5734fdd0511d227b646328ef03c80197
by eric+margenir/algebraic: collapse conversion opcodes (many patterns)
mediump inserts a lot of conversions. This cleans up the IR. All other combinations are covered too.
Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6283>
|
 | src/compiler/nir/nir_opt_algebraic.py (diff) |
Commit
50d335804fb9cfeb20f20b1c031e39a6d239791b
by eric+margenir/algebraic: add late optimizations that optimize out mediump conversions (v3)
v2: move *2*mp patterns to the end of late_optimizations v3: remove ftrunc from the optimizations to fix: dEQP-GLES3.functional.shaders.builtin_functions.common.modf.vec2_lowp_vertex
Reviewed-by: Rob Clark <robdclark@chromium.org> (v1) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6283>
|
 | src/compiler/nir/nir_opt_algebraic.py (diff) |
 | .gitlab-ci/traces-freedreno.yml (diff) |
Commit
a2a330a4edadb5e477d24211091415f82c284fc8
by vleenv50/ir: Add fallthrough statement.
Fix defect reported by Coverity Scan.
Missing break in switch (MISSING_BREAK) unterminated_case: The case for value nir_intrinsic_bindless_image_samples is not terminated by a 'break' statement.
Suggested-by: Karol Herbst <kherbst@redhat.com> Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6645>
|
 | src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp (diff) |
Commit
65d0fa0852ec54b63c9a97eba2bc7655d4ef5f6f
by eric+margenv50/ir: Remove duplicate mask assignment.
A duplicate assignment was added in f2924994bd3e ("nv50/ir: add nv50_ir_prog_info_out").
Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6674>
|
 | src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp (diff) |
Commit
4339ecde35cffce82b5f4b8cd3cfdc88edca4331
by eric+margedisk_cache: move cache dir generation into OS specific helper file
This will make windows support easier to add in future. To avoid code churn this temporarily duplicates the mkdir_if_needed() function, we will delete the duplicate in a following patch.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6197>
|
 | src/util/disk_cache_os.h |
 | src/util/disk_cache_os.c |
 | src/util/disk_cache.c (diff) |
 | src/util/meson.build (diff) |
Commit
62c43391183888e9b595292233fe9d22b0e8d488
by eric+margedisk_cache: add disk_cache_enabled() helper
This will make windows support easier to add in future.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6197>
|
 | src/util/disk_cache_os.h (diff) |
 | src/util/disk_cache.c (diff) |
 | src/util/disk_cache_os.c (diff) |
Commit
889356e731e35275af29a14fb91939f2a30de93e
by eric+margedisk_cache: move index mmap into OS specific helper
This will make windows support easier to add in future.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6197>
|
 | src/util/disk_cache_os.c (diff) |
 | src/util/disk_cache.c (diff) |
 | src/util/disk_cache_os.h (diff) |
|
 | src/util/disk_cache.c (diff) |
 | src/util/disk_cache_os.h (diff) |
 | src/util/disk_cache_os.c (diff) |
|
 | src/util/disk_cache_os.c (diff) |
 | src/util/disk_cache.c (diff) |
 | src/util/disk_cache_os.h (diff) |
Commit
593ef166aed12114d98afae81fcf75c363dc4582
by eric+margedisk_cache: create new helper for writing cache items to disk
This pulls out the cache item writing code from cache_put() into a new helper. In this patch we also move various functions called by this code into the new disk_cache_os.c file.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6197>
|
 | src/util/disk_cache_os.c (diff) |
 | src/util/disk_cache.c (diff) |
 | src/util/disk_cache_os.h (diff) |
|
 | src/util/disk_cache.c (diff) |
 | src/util/disk_cache_os.c (diff) |
 | src/util/disk_cache_os.h (diff) |
Commit
8598dc1a7582f82827cc08fefa89a0e73979d53a
by eric+margedisk_cache: add new OS specific helper disk_cache_evict_item()
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6197>
|
 | src/util/disk_cache_os.h (diff) |
 | src/util/disk_cache_os.c (diff) |
 | src/util/disk_cache.c (diff) |
Commit
367ac07efcc80652e3cbec7f02a2db4e5e2084c1
by eric+margedisk_cache: move cache item loading code into disk_cache_load_item() helper
This should be helpful if someone chooses to implement cache support on windows. Also providing this greater level of abstraction makes it easier to implement alterative cache layouts in future.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6197>
|
 | src/util/disk_cache_os.c (diff) |
 | src/util/disk_cache.c (diff) |
 | src/util/disk_cache_os.h (diff) |
Commit
3182209673fcf157efa7872036e67fae2a5e84ba
by itoralv3d/compiler: fix V3D double-rounding of .8 fixed-point XY coordinates
Pre-V3D 4.3 hardware has a quirk where it expects XY coordinates in .8 fixed-point format, but then it will internally round it to .6 fixed-point, introducing a double rounding. The double rounding can cause very slight differences in triangle raterization coverage that can actually be noticed by some CTS tests.
The correct fix for this as recommended by Broadcom is to convert to .8 fixed-point with ffloor().
Fixes: dEQP-VK.renderpass.suballocation.subpass_dependencies.late_fragment_tests.*
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6677>
|
 | src/broadcom/compiler/v3d_nir_lower_io.c (diff) |
Commit
ef980ac0c1cd65993ba0c1d20e1c09b45bfef99d
by eric+margeradeonsi: fix max syncobj wait timeout
syncobj wait takes int64_t timeout and won't clamp it in kernel code, so we have to pass in INT64_MAX instead of OS_TIMEOUT_INFINITE which is UINT64_MAX. Otherwise syncobj wait with OS_TIMEOUT_INFINITE case just return fail.
Fixes: c638301b42b "radeonsi: fix syncobj wait timeout" Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6676>
|
 | src/gallium/winsys/amdgpu/drm/amdgpu_cs.c (diff) |
Commit
eceb4fb904bdc99782c53e1af1b3677f2fbab0d2
by robclarkfreedreno: fix fence-fd leak
sync_accumulate() does not take ownership.
Fixes: bf23ff83e69 ("freedreno: fence_server_sync() fixes") Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6692>
|
 | src/gallium/drivers/freedreno/freedreno_context.h (diff) |
Commit
656d8edd9e141091e3f43d6dab587c5da00951d1
by maraeonir/opt_vectorize: don't lose exact and no_*_wrap flags
This fixes a bunch of dEQP GLES tests.
Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6694>
|
 | src/compiler/nir/nir_opt_vectorize.c (diff) |
Commit
e3101c96bb64dd5c8246654a9c4865fa99a060b0
by eric+margeanv/image: Disable multi-layer CCS_E on TGL+
Anv doesn't do multi-layer fast-clear tracking, but TGL may add fast-clears to multiple layers. Disable CCS_E for image arrays on TGL+ until anv gets more clear color tracking abilities.
With this change, anv+TGL now passes: * dEQP-VK.multiview.readback_implicit_clear.15_15_15_15 * dEQP-VK.multiview.readback_implicit_clear.8_1_1_8 * dEQP-VK.multiview.readback_implicit_clear.1_2_4_8_16_32 * dEQP-VK.multiview.renderpass2.readback_implicit_clear.15_15_15_15 * dEQP-VK.multiview.renderpass2.readback_implicit_clear.8_1_1_8 * dEQP-VK.multiview.renderpass2.readback_implicit_clear.1_2_4_8_16_32
v2. Mention HSD 14010672564. (Sagar)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6528>
|
 | src/intel/vulkan/anv_image.c (diff) |
Commit
20a4235c4c96592e13648da494ca446288ac9a2f
by jordan.l.justenanv, iris: Set MediaSamplerDOPClockGateEnable for gen12+
This has been shown to help performance on TGL and DG1. This could be applied to gen9+, but we still need to show if it helps with those platforms.
Rework: * Make change in src/intel/vulkan/genX_cmd_buffer.c too. (Ken) * Keep mask as 3 for gen < 12
Cc: mesa-stable@lists.freedesktop.org Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6684>
|
 | src/intel/vulkan/genX_state.c (diff) |
 | src/intel/vulkan/genX_cmd_buffer.c (diff) |
 | src/gallium/drivers/iris/iris_state.c (diff) |
Commit
bea6290ca090a7be7e7d51c9316cf68337ac4e1f
by eric+margeturnip: device global bo list
Avoid having to deal with BO tracking. However, the kernel still requires a bo list, so keep a global one which can be re-used for every submit.
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6686>
|
 | src/freedreno/vulkan/tu_descriptor_set.h (diff) |
 | src/freedreno/vulkan/tu_cs.c (diff) |
 | src/freedreno/vulkan/tu_drm.c (diff) |
 | src/freedreno/vulkan/tu_device.c (diff) |
 | src/freedreno/vulkan/tu_descriptor_set.c (diff) |
 | src/freedreno/vulkan/tu_query.c (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
 | src/freedreno/vulkan/tu_cmd_buffer.c (diff) |
 | src/freedreno/vulkan/tu_clear_blit.c (diff) |
Commit
4868ce1451ffceb65a03ef230da01da639286c2c
by eric+margelima: dont split vec3 unaligned load inputs
It seems that the mali400 pp is unable to load vec3 unaligned varyings. This can happen in the current state with mesa if a varying float is put into the first component of a vec4 and a vec3 is packed right after it. This would be fine as by default nir would create a vec4 load followed by a mov with swizzle to realign the components into a vec3. In lima_nir_split_load_input, this becomes a separate vec3 load expecting the unaligned load. Since this can't happen, skip the load input splitting for this special case.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com> Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6507>
|
 | src/gallium/drivers/lima/ir/lima_nir_split_load_input.c (diff) |
Commit
12567de2be7291467e023a6c7fe2eca19ae5f820
by tapani.palliglsl: mark some builtins with correct glsl(es) version check
GLSL Desktop spec 1.30.x: "New built-ins: trunc(), round(), roundEven(), isnan(), isinf(), modf()"
For ES, 3.00.x is the first ES spec that mentions the builtins.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6455>
|
 | src/compiler/glsl/builtin_functions.cpp (diff) |
Commit
efa1c760d15fb645bed9d6c83e73a770b2fe0bd6
by eric+margeaco: Fix emit_boolean_exclusive_scan in wave32 mode.
Use the lane mask instead of s2 for the register class.
Cc: mesa-stable@lists.freedesktop.org Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6699>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
f3780e7b8cfcc14580ace508ea1e9d197a1377c6
by eric+margeaco: Clean up emit_mbcnt.
Make it less error-prone and more consistent with other helpers. Pass the masks as a single argument rather than two. In wave64 mode, split the argument into low and high halves in emit_mbcnt rather than where it is called.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6699>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
26299c87f8c399be4a02db6da3d53e5d2bd08668
by eric+margeaco: Add base argument to emit_mbcnt.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6699>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
8a2a9e9bb8879cf3e88870fc5ff4c36e190fa012
by pellouxglsl: fix per_vertex_accumulator::fields size
49d35f3d882bd0f4418a1ce056344b8f06bd75dd moved gl_Layer/gl_ViewportIndex/gl_ViewportMask as builtins but fields size wasn't increased.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3508 Fixes: 49d35f3d882 ("glsl: declare gl_Layer/gl_ViewportIndex/gl_ViewportMask as vs builtins") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6688>
|
 | src/compiler/glsl/builtin_variables.cpp (diff) |
Commit
00914e2179915a302a1c9f63b9a96ca0710b4132
by eric+margenir/algebraic: fold some nested comparisons with ball and bany
Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6604>
|
 | src/compiler/nir/nir_opt_algebraic.py (diff) |
Commit
f3109c457989cc9b7eec79eef02665749103eeb6
by eric+margeturnip: avoid heap allocations in QueueSubmit when semaphores are used
Use the stack. (note: we already do for drm_msm_gem_submit_cmd array, and using calloc() for heap allocations in a VK driver is wrong
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6687>
|
 | src/freedreno/vulkan/tu_drm.c (diff) |
Commit
322ddbd538336a1ac01261df57e0a84d75f97f83
by eric+margepanfrost: Fix nonzero stencil mask on vertex/compute
Probably harmless but looks funny in the decode.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6712>
|
 | src/panfrost/lib/midgard.xml (diff) |
 | src/panfrost/lib/pan_blit.c (diff) |
Commit
c4f518ce6a67508eaf4b16671f9a5d2777c74783
by eric+margepan/bit: Set d3d=true for CMP tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Fixes: ec37c7126dc ("bifrost: Emit "d3d" variant of comparison instructions") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6712>
|
 | src/panfrost/bifrost/test/bi_interpret.c (diff) |
Commit
b10f34a78563045c989083b1fb549fb11b8d2485
by eric+margepan/bit: Fix unit tests
Broken by the various GenXML refactors, oops!
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6712>
|
 | src/panfrost/bifrost/test/bi_submit.c (diff) |
Commit
f3150abe5ef01b8cb36752aaf74512d4affefb0c
by eric+margeetnaviv: call nir_opt_shrink_vectors(..) in opt loop
total instructions in shared programs: 105044 -> 103312 (-1.65%) instructions in affected programs: 27328 -> 25596 (-6.34%) helped: 55 HURT: 0 helped stats (abs) min: 4 max: 96 x̄: 31.49 x̃: 24 helped stats (rel) min: 1.18% max: 23.08% x̄: 8.26% x̃: 6.88% 95% mean confidence interval for instructions value: -37.81 -25.18 95% mean confidence interval for instructions %-change: -9.66% -6.85% Instructions are helped.
total temps in shared programs: 2960 -> 2917 (-1.45%) temps in affected programs: 425 -> 382 (-10.12%) helped: 41 HURT: 6 helped stats (abs) min: 1 max: 3 x̄: 1.20 x̃: 1 helped stats (rel) min: 7.14% max: 25.00% x̄: 13.79% x̃: 12.50% HURT stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1 HURT stats (rel) min: 12.50% max: 25.00% x̄: 17.52% x̃: 16.67% 95% mean confidence interval for temps value: -1.17 -0.66 95% mean confidence interval for temps %-change: -13.30% -6.29% Temps are helped.
total immediates in shared programs: 16772 -> 16468 (-1.81%) immediates in affected programs: 4304 -> 4000 (-7.06%) helped: 59 HURT: 0 helped stats (abs) min: 4 max: 16 x̄: 5.15 x̃: 4 helped stats (rel) min: 2.22% max: 33.33% x̄: 9.31% x̃: 7.14% 95% mean confidence interval for immediates value: -5.88 -4.43 95% mean confidence interval for immediates %-change: -11.14% -7.49% Immediates are helped.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6572>
|
 | src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c (diff) |
Commit
16e788416f05ac3347af99e0715e96e42f616be8
by issor.oruamandroid: aco/isel: Move context initialization code to a dedicated file
Changes are necessary to properly build libmesa_aco static library for Android. was removed in 47de55328 "aco/isel: Move context initialization code to a dedicated file" so filter-out of aco_instruction_selection_setup.cpp in Android is removed.
Fixes the following building errors:
FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/vulkan.radv_intermediates/LINKED/vulkan.radv.so ... ld.lld: error: undefined symbol: aco::setup_isel_context(aco::Program*, unsigned int, nir_shader* const*, ac_shader_config*, radv_shader_args*, bool) >>> referenced by aco_instruction_selection.cpp:10879 (external/mesa/src/amd/compiler/aco_instruction_selection.cpp:10879) >>> aco_instruction_selection.o:(aco::select_program(aco::Program*, unsigned int, nir_shader* const*, ac_shader_config*, radv_shader_args*)) in archive out/target/product/x86_64/obj/STATIC_LIBRARIES/libmesa_aco_intermediates/libmesa_aco.a ... ld.lld: error: undefined symbol: aco::init_context(aco::isel_context*, nir_shader*) >>> referenced by aco_instruction_selection.cpp:10885 (external/mesa/src/amd/compiler/aco_instruction_selection.cpp:10885) >>> aco_instruction_selection.o:(aco::select_program(aco::Program*, unsigned int, nir_shader* const*, ac_shader_config*, radv_shader_args*)) in archive out/target/product/x86_64/obj/STATIC_LIBRARIES/libmesa_aco_intermediates/libmesa_aco.a
Fixes: 47de55328 ("aco/isel: Move context initialization code to a dedicated file") Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6703>
|
 | src/amd/Android.compiler.mk (diff) |
 | src/amd/Makefile.sources (diff) |
Commit
50f1cd40767469c96628331aa0ce91fcde328030
by vleeac/llvm: Fix nonportable sizeof.
Fix defect reported by Coverity.
Sizeof not portable (SIZEOF_MISMATCH) suspicious_sizeof: Passing argument vec_size * 8UL /* sizeof (LLVMValueRef *) */ to function __builtin_alloca and then casting the return value to LLVMValueRef * is suspicious. In this particular case sizeof (LLVMValueRef *) happens to be equal to sizeof (LLVMValueRef), but this is not a portable assumption.
Fixes: ca74603b4f6e ("ac/llvm: add better code for isign") Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6682>
|
 | src/amd/llvm/ac_llvm_build.c (diff) |
Commit
e607477d7ca2550c0b7f53f3886b4b6fd055d779
by eric+margefreedreno: Check file descriptor before write.
Fix defect reported by Coverity Scan.
Argument cannot be negative (NEGATIVE_RETURNS) negative_returns: fd is passed to a parameter that cannot be negative.
Fixes: 1ea4ef0d3be8 ("freedreno: slurp in decode tools") Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6696>
|
 | src/freedreno/decode/cffdec.c (diff) |
Commit
c7719b8cfc4c17f4fd316d9f2ea0c314ef030478
by eric+margenv50/ir: Initialize Converter members.
Fix defects reported by Coverity Scan.
Uninitialized pointer field (UNINIT_CTOR) Non-static class member exit is not initialized in this constructor nor in any functions that it calls Non-static class member immInsertPos is not initialized in this constructor nor in any functions that it calls.
Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6695>
|
 | src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp (diff) |
Commit
320d80f2cee673fbd6845e7bcef56470c4516d97
by eric+margeintel/genxml: make sure test assert are compiled in
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Anuj Phogat anuj.phogat@gmail.com Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6678>
|
 | src/intel/common/tests/genxml_test.c (diff) |
Commit
51a6261d38b2804c2a45f16236b1000b7777c220
by tapani.palliiris: remove additional pipe control done before hiz for older gens
The restriction found in removed comment is not found on new specs.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6593>
|
 | src/gallium/drivers/iris/iris_resolve.c (diff) |
Commit
7bfaeaa590d8b4842aaafc5ff392caa624e269d3
by eric+margeaco: pass -fno-exceptions and -fno-rtti
We don't use exceptions or RTTI at all, so pass this flag to the compiler to allow it to create better code.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Acked-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6315>
|
 | src/amd/compiler/tests/meson.build (diff) |
 | src/amd/compiler/meson.build (diff) |
Commit
8c7ca97d3e3e9f83d7d968fcd916e6c1242cfd75
by eric+margefrontends/va: Add support for NV12/P010/P016 to vaDeriveImage
Signed-off-by: Thong Thai <thong.thai@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5942>
|
 | src/gallium/frontends/va/image.c (diff) |
Commit
fcb558321e65b62244a11e0066bb8713b1854721
by eric+margefrontends/va: Derive image from interlaced buffers
Allow vaDriveImage to derive a vaImage from interlaced buffers by creating a new progressive buffer.
v2: Keeps the surface used by DeriveImage untouched (Pierre-Eric) v3: Fixed a segfault reported by Roman Elshin
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1428 Signed-off-by: Thong Thai <thong.thai@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5942>
|
 | src/gallium/frontends/va/va_private.h (diff) |
 | src/gallium/frontends/va/buffer.c (diff) |
 | src/gallium/frontends/va/image.c (diff) |
Commit
338745c6f4b7133d7b36f78562d46bc4e8d368f5
by eric+margefrontends/va: Derive image from interlaced buffers in some cases
Add an allowlist to make an exception when deriving images from interlaced buffers. Normally, the function should fail if the surface needs to be modified to derive the image. But some applications do not follow the fall-back method of using vaCreateImage + vaPutImage as mentioned in the VAAPI documentation, so we have to make an exception.
Signed-off-by: Thong Thai <thong.thai@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5942>
|
 | src/gallium/frontends/va/image.c (diff) |
Commit
e732750b160f28270aaa86431d67fedccf1cfec6
by eric+margefreedreno/ir3: allow layer/viewport output for VS/GS/DS
With VK_EXT_shader_viewport_index_layer, these stages can all output the viewport or layer id, and not just GS anymore.
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5832>
|
 | src/freedreno/ir3/ir3_compiler_nir.c (diff) |
Commit
52534c3a865298015711c948bc9f3408c5485aa4
by eric+margefreedreno/ir3: add view_zero to shader key
Does the same thing as layer_zero, but for VARYING_SLOT_VIEWPORT.
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5832>
|
 | src/freedreno/ir3/ir3_shader.h (diff) |
 | src/freedreno/ir3/ir3_shader.c (diff) |
 | src/freedreno/ir3/ir3_nir.c (diff) |
Commit
efff73422049d738b4adfaa34d5fde78a2805d5e
by eric+margeturnip: multiViewport and VK_EXT_shader_viewport_index_layer
Passes at least: dEQP-VK.dynamic_state.vp_state.viewport_array dEQP-VK.draw.shader_viewport_index.* dEQP-VK.draw.shader_layer.*
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5832>
|
 | src/freedreno/vulkan/tu_cmd_buffer.c (diff) |
 | src/freedreno/vulkan/tu_shader.c (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
 | src/freedreno/vulkan/tu_device.c (diff) |
 | src/freedreno/vulkan/tu_extensions.py (diff) |
 | src/freedreno/vulkan/tu_pipeline.c (diff) |
|
 | src/compiler/spirv/spirv_to_nir.c (diff) |
Commit
782016ea42bba3a3e3c5f116bd6b3b6c5f314d53
by vleelibgl-gdi: Fix unused-variable warnings.
src/gallium/targets/libgl-gdi/libgl_gdi.c:59:16: warning: ‘use_swr’ defined but not used [-Wunused-variable] 59 | static boolean use_swr = FALSE; | ^~~~~~~ src/gallium/targets/libgl-gdi/libgl_gdi.c:58:16: warning: ‘use_llvmpipe’ defined but not used [-Wunused-variable] 58 | static boolean use_llvmpipe = FALSE; | ^~~~~~~~~~~~
Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6508>
|
 | src/gallium/targets/libgl-gdi/libgl_gdi.c (diff) |
Commit
a3512ddfdf7ff1dff0920568102bfaef99ab498e
by eric+margest/mesa: don't enable NV_copy_depth_to_color if NIR doesn't support FP64
Fixes: e512f2cef92 - mesa: add NV_copy_depth_to_color support for nir Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3459
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6467>
|
 | src/mesa/state_tracker/st_extensions.c (diff) |
Commit
57bf4c2028cffe24ffb55b96592f7e33aa18f1ce
by eric+margenir,radeonsi: move ffma fusing to late optimizations for better codegen
The freedreno trace changes were suggested by Rob Clark.
ALU performance is higher, because ffma is used more often, but so is register usage, because trinary opcodes (such as ffma) usually need at least 3 live registers.
54793 shaders in 33659 tests Totals: SGPRS: 2639746 -> 2642938 (0.12 %) VGPRS: 1534120 -> 1536392 (0.15 %) Spilled SGPRs: 3541 -> 3618 (2.17 %) Spilled VGPRs: 33 -> 44 (33.33 %) Scratch size: 292 -> 312 (6.85 %) dwords per thread Code Size: 55639836 -> 55620116 (-0.04 %) bytes Max Waves: 964785 -> 963977 (-0.08 %)
Totals from affected shaders: SGPRS: 1105800 -> 1108992 (0.29 %) VGPRS: 635292 -> 637564 (0.36 %) Spilled SGPRs: 3193 -> 3270 (2.41 %) Spilled VGPRs: 33 -> 44 (33.33 %) Scratch size: 36 -> 56 (55.56 %) dwords per thread Code Size: 31568708 -> 31548988 (-0.06 %) bytes Max Waves: 319991 -> 319183 (-0.25 %)
Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6596>
|
 | .gitlab-ci/traces-freedreno.yml (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/compiler/nir/nir_opt_algebraic.py (diff) |
 | .gitlab-ci/traces-radeonsi.yml (diff) |
Commit
758ab39d25e10d585929b87a8a2891c5a68b7c55
by eric+margeradeonsi: clean up ffma handling
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6596>
|
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
 | src/gallium/drivers/radeonsi/si_get.c (diff) |
Commit
b23013db0aa6845d661c2da5d4003615b064e01f
by eric+margeRevert "radeonsi: set BIG_PAGE fields on gfx10.3"
This reverts commit 430d384c311468c6180a1d67ed90bb74d4fe1c3b.
BIT_PAGE can't be set for GTT and we don't know if a buffer has been evicted to GTT.
Fixes: 430d384c311468c6180a1d67ed90bb74d4fe1c3b
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6722>
|
 | src/gallium/drivers/radeonsi/si_pipe.h (diff) |
 | src/gallium/drivers/radeonsi/si_state.c (diff) |
Commit
4790811d78011d45830d9543ad6e7401391cfb15
by eric+margeRevert "radeonsi: move L2_CACHE_CONTROL registers into si_emit_framebuffer_state"
This reverts commit 7edf15ad4762eac3bfbcfbf1c8ec8ea4d955c6d6.
The register value is immutable now.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6722>
|
 | src/gallium/drivers/radeonsi/si_state.c (diff) |
Commit
fd990aa4de3cbfa2e1f217e0627c8f12526c77b6
by eric+margedocs/download: mention tarball GPG signatures and link to the keys
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3507 Signed-off-by: Eric Engestrom <eric@engestrom.ch> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6679>
|
 | docs/download.rst (diff) |
Commit
babe86f6cf455cc3e8369aee5336a78859011d62
by eric+margedocs: add another 20.1.x release to allow for more overlap with 20.2
The aim is to have the last release of the old branch on or after the .1 release on new one, but as things stand the last 20.1 would happen between 20.2.0 and 20.2.1, so let's add one more.
Signed-off-by: Eric Engestrom <eric@engestrom.ch> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6615>
|
 | docs/release-calendar.rst (diff) |
Commit
15038fe621afb24cc43968a8c133642842268f3f
by ericdocs/release-calendar: update 20.2
In !6574 I fixed the dates, but I didn't realise there was one too many releases in the list, as `-rc3` had already been released and `-rc4` was about to be.
`-rc4` was since released, so the next 20.2 release is now `-rc5`, and it's slipped another week; let's update the calendar to that.
Signed-off-by: Eric Engestrom <eric@engestrom.ch> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6614>
|
 | docs/release-calendar.rst (diff) |
Commit
eb60849ea2484c6ba09843ce1c29ba161fa6d02e
by pellouxr600/uvd: set dec->bs_ptr = NULL on unmap
To avoid using a dangling pointer. See https://gitlab.freedesktop.org/mesa/mesa/-/issues/1308
Cc: mesa-stable Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6556>
|
 | src/gallium/drivers/r600/radeon_uvd.c (diff) |
Commit
7d853966df4f6d0ded845a6ba2b2af7c46404157
by pellouxradeon/vcn: set dec->bs_ptr = NULL on unmap
To avoid using a dangling pointer.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1308 Cc: mesa-stable Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6556>
|
 | src/gallium/drivers/radeon/radeon_vcn_dec.c (diff) |
 | src/gallium/drivers/radeon/radeon_vcn_dec_jpeg.c (diff) |
Commit
c493bb9a5700e3db02279a0073abac697c01d8d8
by pellouxradeonsi: fix quant_mode selection for large negative values
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6685>
|
 | src/gallium/drivers/radeonsi/si_state_viewport.c (diff) |
Commit
f1730bed8f05e0b017875e383c9f413e7ef10b79
by pellouxradeonsi: fix guardband handling for large values
When minx = -32768 (ViewportBounds.Min) we'll hit the "left <= -1, ..." assert because 'left' is computed as:
(-65535 / 2 - translate_x) / (minx - translate_x)
This commit fixes the problem by using the full max_viewport_size => [-32768, 32767] instead of [-32767, 32767] for SI_QUANT_MODE_16_8_FIXED_POINT_1_256TH.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3502 Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6685>
|
 | src/gallium/drivers/radeonsi/si_state_viewport.c (diff) |
Commit
85f39cab8bda7cd03445193de4c80649791ba569
by eric+marger600: revert disabling llvm draw
Now that llvm supports NIR and lowers uniforms to UBO in draw calls when this hasn't be done before this can be used again.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
|
 | src/gallium/drivers/r600/r600_pipe_common.c (diff) |
Commit
688680decce90fa30615f8933a72a23c6862b893
by eric+marger600/nir: fetch sources and split uniforms before emittting alu instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
|
 | src/gallium/drivers/r600/sfn/sfn_value_gpr.h (diff) |
 | src/gallium/drivers/r600/sfn/sfn_shader_base.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.h (diff) |
 | src/gallium/drivers/r600/sfn/sfn_valuepool.cpp (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_instruction_export.cpp (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_shader_vertex.cpp (diff) |
Commit
daaa71924ad38019f12e5ed4aba1ddce0982846e
by eric+marger600/sfn: clone shader before lowering to registers and src/dest modifiers
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
|
 | src/gallium/drivers/r600/sfn/sfn_nir.cpp (diff) |
Commit
f2280e03e21d37ab9bf3b8f0ebeea42dda7fdf37
by eric+marger600/sfn: Fix ordering of tex param moves
Both moves should happen in the same instuction group, otherwise the lod/bias value will be overwritten by the shadow compare value.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
|
 | src/gallium/drivers/r600/sfn/sfn_emittexinstruction.cpp (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_emittexinstruction.cpp (diff) |
|
 | src/gallium/drivers/r600/r600_pipe_common.c (diff) |
Commit
dfa45e26e21bb30885bc190b3be7a4e0affc0cbe
by eric+marger600/sfn: Fix split_alu_modifiers
Don't reuse the dest register so we can better track instruction dependencies later.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
|
 | src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.h (diff) |
Commit
02581acd07af776aefab7ce752902270ba7a12b2
by eric+marger600/sfn: Fix bitfield ops and 2x16 split_y
Don't reuse the dest register to make instruction dependency tracking easier.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
|
 | src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.cpp (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.cpp (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_shader_base.cpp (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_shader_vertex.cpp (diff) |
|
 | src/gallium/drivers/v3d/v3d_resource.c (diff) |
|
 | src/gallium/drivers/vc4/vc4_resource.c (diff) |
Commit
8939c642e06782be6e1066b2f97f491c2c131ee9
by eric+margegallium/aux: remove unused u_blit.[ch]
There's no users of this code, so we might as well get rid of it to avoid confusion with u_blitter.[ch].
Acked-by: Jose Fonseca <jfonseca@vmware.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6651>
|
 | src/gallium/auxiliary/util/u_blit.h |
 | src/gallium/auxiliary/meson.build (diff) |
 | src/gallium/auxiliary/Makefile.sources (diff) |
 | src/gallium/auxiliary/util/u_blit.c |
Commit
2c9fee9b6adcc341948e2cac8de500c6384cfc22
by eric+margenir: Add option lower_uniforms_to_ubo
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
|
 | src/compiler/nir/nir.h (diff) |
Commit
b155b6869ca98d1d39005fb7e621d320a232b48a
by eric+margeradeonsi: set compiler flag lower_uniforms_to_ubo
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
|
 | src/gallium/drivers/radeonsi/si_get.c (diff) |
Commit
7ab804dbb46ff55ad28c639f04fd050b9959fc6c
by eric+margefreedreno/ir3: set lower_uniforms_to_ubo compiler flag
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
|
 | src/freedreno/ir3/ir3_nir.c (diff) |
Commit
80cde3ad55c6eb6aed9fbe9c4d2c6a8c4eceb61a
by eric+margeintel/compiler: Set lower_uniform_to_ubo compiler flag
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
|
 | src/intel/compiler/brw_compiler.c (diff) |
Commit
feb463da6370a4de3f1c856db8da3bca7fd2b388
by eric+margellvmpipe: set lower_uniform_to_ubo compiler flag
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
|
 | src/gallium/drivers/llvmpipe/lp_screen.c (diff) |
Commit
123bdb61cc0be64ee29b63cf27565ec98c2a0ab8
by eric+margegallium+mesa/st: lower uniforms based on compiler flag instead of packed uniforms cap
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
|
 | src/gallium/auxiliary/draw/draw_vs_llvm.c (diff) |
 | src/mesa/state_tracker/st_glsl_to_nir.cpp (diff) |
 | src/gallium/auxiliary/nir/tgsi_to_nir.c (diff) |
|
 | docs/relnotes/20.1.8.rst |
|
 | docs/relnotes.rst (diff) |
 | docs/release-calendar.rst (diff) |
|
 | src/intel/vulkan/anv_device.c (diff) |
Commit
b75a92e2010e81fdd387f1eae3be11e327d0a0bf
by eric+margeanv: assert that the target bo is valid when adding a reloc list
this catches some undefined behavior like e.g., using a stale descriptorset that references deleted bos, which I would absolutely never do
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6747>
|
 | src/intel/vulkan/anv_batch_chain.c (diff) |
Commit
2044b1fba5d19d475d73f39ddb17ff86213941a1
by eric+margepan/bi: Lower flrp16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Fixes: 3c8934a644b ("nir/algebraic: add flrp patterns for 16 and 64 bits") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/bifrost_compile.h (diff) |
Commit
07a5ec83fb09de861d940fea69b49cefb08fda75
by eric+margepan/bi: Add XML describing the instruction set
Throughout this series, this XML file will serve as architectural ground truth. It contains every instruction in the instruction set with all programmable modifiers, as well as logic for computing derived values (indirectly specified modifiers) and swapping operands as needed by numerous encodings. It also allows for multiple encodings per instruction differentiated by exact bits (a generalization of opcodes), with different derived fields in each encoding, and logic tests to select between the encodings at pack time.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/ISA.xml |
Commit
58da316de7a7858eb96a18ee8c1f9d35bf0c2b99
by eric+margepan/bi: Add ISA parser
This Python script parses the ISA.xml file to produce a normalized in-memory representation suitable for the disassembly and packing scripts to consume. In particular, it papers over details about duplicate encodings and default fields.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/isa_parse.py |
Commit
cf8f79a9fcfcca1e4337ed22c02595516024c22c
by eric+margepan/bi: Add packing generator
From the ISA definition, we can generate a function for each instruction that looks at the bi_instruction in the intermediate representation and emits a 20- or 23-bit word (for ADD/FMA respectively) containing that instruction with all of its modifiers.
These will approximate the old packing routines, although the mapping of bi_instruction to machine instructions will be hardcoded (at least for now).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/gen_pack.py |
Commit
82f33155f6d4b946d88cd0c0b6723f7cedb9a518
by eric+margepan/bi: Add disassembler generator
Given a parsed instruction set definition, this script generates instruction disassembly routines responsible for decoding instruction words and pretty-printing. Decoding is somewhat complex as with the previous disassembler but can be automated.
Disssembly is complicated by indirect specifications of instruction modifiers. These specifiers are given as logic expressions in the XML, which optimizes for straightforwaard packing but makes disassembly awkward. Instead of attempting to invert the logic directly, we generate lookup tables of `modifiers -> encoding` maps which we may invert directly to produce a lookup table for the `encoding -> modifiers` map needed for disassembly.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/gen_disasm.py |
Commit
944cb8bcba51342cd3c3d38a77a7970242eda74b
by eric+margepan/bi: Add disassembly prototypes
Fix a header guard too.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/disassemble.h (diff) |
Commit
05041811ce51ebf53cd77acd88c53670b0ef78b1
by eric+margepan/bi: Add bi_disasm_dest_* helpers
Used to print the actual register/temporary for an instruction destination given the port arrangement.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/disassemble.c (diff) |
 | src/panfrost/bifrost/disassemble.h (diff) |
Commit
deab75250c5cd90335ae2303f89eda33e10c870c
by eric+margepan/bi: Export dump_src
Needed in generated disassembler.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/disassemble.h (diff) |
 | src/panfrost/bifrost/disassemble.c (diff) |
Commit
f8fc21059f304cd22796d8e762ff7a5d00dbfa3f
by eric+margepan/bi: Use new disassembler
We still use the clause/register decoding, but we now use the metaprogrammed instruction decoding for the bulk of the operation.
We add a meson rule to call out to the Python generator script during the build process.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/disassemble.c (diff) |
 | src/panfrost/bifrost/meson.build (diff) |
Commit
5a569d09f421eb6445ca2f4500a38fbb1c76896a
by eric+margepan/bi: Use canonical syntax for registers/uniforms/imms
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/disassemble.c (diff) |
Commit
42ec4aa47851fa5c5ce22ab03b2762b7bdc3e027
by eric+margepan/bi: Use canonical syntax for special constants
Adds some missing constants relevant to compute shaders, etc.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/disassemble.c (diff) |
Commit
33710ff8953c5112b88ae8f0f2ff55b021815ca6
by eric+margepan/bi: Add dummy carry/borrow argument for iadd/isub
On FMA, a carry/borrow is required for iaddc/isubb (whereas the ADD counterparts don't support carrying/borrowing). The trick is to model this with an extra dummy (ZERO) argument which is free to encode on FMA, and in the scheduler, "demote" to the non-carried versions if we want to schedule to ADD.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/test/bi_test_pack.c (diff) |
 | src/panfrost/bifrost/bifrost_compile.c (diff) |
Commit
6f5b78874ab34095dd55d6020d3d63318b7336d8
by eric+margepan/bi: Introduce segments into the IR
Needed to select between global, UBO, TLS, and WLS addressing modes, required to implement loads/stores correctly.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/bifrost_compile.c (diff) |
 | src/panfrost/bifrost/bi_print.c (diff) |
 | src/panfrost/bifrost/compiler.h (diff) |
 | src/panfrost/bifrost/test/bi_test_pack.c (diff) |
Commit
8dd3a81c1d7fd43218a4d206259dbc1cd6fc0a17
by eric+margepan/bi: Add format field to IR
To make register_format packing explicit, and possibly in the future support the auto mode.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/compiler.h (diff) |
 | src/panfrost/bifrost/bi_print.c (diff) |
 | src/panfrost/bifrost/bifrost_compile.c (diff) |
 | src/panfrost/bifrost/test/bi_test_pack.c (diff) |
Commit
67d89568af22c77df6d63e6c5dd405692a846ab3
by eric+margepan/bi: Track compute_lod in IR
We'll need to differentiate tex and txl.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/bifrost_compile.c (diff) |
 | src/panfrost/bifrost/compiler.h (diff) |
 | src/panfrost/bifrost/bi_print.c (diff) |
Commit
3d63a476f7a05eaa7810b86405381285fb6672ad
by eric+margepan/bi: Pass blend descriptor explicitly in IR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/bifrost_compile.c (diff) |
Commit
08b105d78254612ad64fe7aec825c3fbe102cc90
by eric+margepan/bi: Use 8-bit shifts
Logically, it doesn't matter, but we want the IR to accurately reflect the hardware behaviour.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/bifrost_compile.c (diff) |
 | src/panfrost/bifrost/test/bi_test_pack.c (diff) |
Commit
d2158a5b3016bf4e6593ba4f0fc4de653323bf87
by eric+margepan/bi: Use src1/dest_invert instead of src_invert[]
This maps more closely to the hardware, which makes for easier packing.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/test/bi_test_pack.c (diff) |
 | src/panfrost/bifrost/bi_pack.c (diff) |
 | src/panfrost/bifrost/bifrost_compile.c (diff) |
 | src/panfrost/bifrost/compiler.h (diff) |
 | src/panfrost/bifrost/bi_print.c (diff) |
 | src/panfrost/bifrost/test/bi_interpret.c (diff) |
Commit
3fadd8234611837798311ff1ace7a39c1cc3adc4
by eric+margepan/bi: Move packing helpers to dedicated file
We'll need to access them from the autogenerated section.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/bi_pack_helpers.h |
 | src/panfrost/bifrost/bi_pack.c (diff) |
Commit
2ff53879f214700def92fd2cc3ead89119cd2fef
by eric+margepan/bi: Use new packing
...and remove the old manual code.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/compiler.h (diff) |
 | src/panfrost/bifrost/meson.build (diff) |
 | src/panfrost/bifrost/bi_pack.c (diff) |
 | src/panfrost/bifrost/bifrost_compile.c (diff) |
Commit
ec43629e8c03f759e446018d56e4adece3dc913c
by eric+margepan/bi: Remove unused prints
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/bi_print.h (diff) |
 | src/panfrost/bifrost/bi_print_common.c (diff) |
 | src/panfrost/bifrost/bi_print_common.h (diff) |
Commit
865e252dd0185313cbf06cca782fc3b3c3867239
by eric+margepan/bi: Remove unused packing data structures
Replaced by metaprogrammed variants.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/bifrost.h (diff) |
Commit
a51aa6feb4dab07e29b9834f7ad431cc0dd6f9fe
by eric+margepan/bi: Drop *FMIN reference
Even on G72, it's unsupported.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
|
 | src/panfrost/bifrost/bi_pack.c (diff) |
 | src/panfrost/bifrost/bi_tables.c (diff) |
Commit
2aaa1564ad0620724eaf38d66cec85dafad4613e
by apinheironir/lower_io: don't reduce range if parent length is zero
When handling arrays, range is increased based on the array size minus one. But if such is zero, it has the effect of reducing the range. Handle that case by returning the unknown range value.
v2: * Add missing braces. * Return unknown range in this case, instead of keeping the initial range. v3: Simplify code, using existing "fail" label. (Jason)
Fixes the following using v3dv: dEQP-VK.graphicsfuzz.cov-simplify-clamp-max-itself
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6737>
|
 | src/compiler/nir/nir_lower_io.c (diff) |
Commit
45bff4e989036e9c9ef9fb475c4305ccc80a6c3d
by eric+margeutil: Makefile.sources: Add disk_cache_os.{c,h}
The functions in disk_cache_os are referenced by disk_cache but these files are not included in builds based on Makefile.sources such as Android, resulting in linker errors.
Fixes: 4339ecde35c ("disk_cache: move cache dir generation into OS specific helper file") Signed-off-by: Marijn Suijten <marijns95@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6702>
|
 | src/util/Makefile.sources (diff) |
|
 | src/freedreno/vulkan/tu_device.c (diff) |
Commit
4ac4cdb5bfece49db29939e00dbf8d67fddc3b65
by eric+margeaco: fix incorrect assertion in emit_vop3a_instruction()
Fixes some float controls tests on Polaris10.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Fixes: 0b6448bbe791474a152d53bfaf750408807ac166 ('aco/isel: refactor emit_vop3a_instruction() to handle 2 operand instructions')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6744>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
98eb00face93b9af5aac19008ecff5a2bf376745
by eric+marger600: enable lowering uniforms to UBO
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6743>
|
 | src/gallium/drivers/r600/sfn/sfn_shader_base.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_shader_base.h (diff) |
 | src/gallium/drivers/r600/r600_pipe_common.c (diff) |
Commit
18e97817148eb376274a8749c03b45c2f817c139
by eric+marger600/sfn: Use load_ubo_vec4 lowering pass
This replaces the lowering pass to align UBO loads at 16 byte boundaries.
v2: use nir functions to query constants in ubo_vec4 (Eric)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6743>
|
 | src/gallium/drivers/r600/sfn/sfn_shader_base.h (diff) |
 | src/gallium/drivers/r600/sfn/sfn_nir.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_shader_base.cpp (diff) |
Commit
6f2b6952bef69af9cf8ae66be4261837bacb3137
by eric+margenir: remove ubo_r600 instrinsic since ubo_vec4 is used now
As suggested by Eric.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> eviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6743>
|
 | src/compiler/nir/nir_intrinsics.py (diff) |
Commit
85cc2950a045ca0fe153498fb7d48322d2906482
by eric+margeradv: initialize with expanded cmask if the destination layout needs it
If radv_layout_can_fast_clear() is false, 028C70_COMPRESSION is unset when the image is rendered to and CMASK isn't updated. This appears to cause FMASK to be ignored and the 0th sample to always be used.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3449 Fixes: 7b21ce401f7e81deca5ab6a4353b1369d059bcee ('radv: disable FMASK compression when drawing with GENERAL layout')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6745>
|
 | src/amd/vulkan/radv_cmd_buffer.c (diff) |
Commit
a163cba1e3a20536377d9b0f9617f8433d580114
by jasonanv: Fix the target_bo assertion in anv_reloc_list_add
Fixes: b75a92e2010e "anv: assert that the target bo is valid..." Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3528 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6759>
|
 | src/intel/vulkan/anv_batch_chain.c (diff) |
Commit
d74fe47101995d2659b1e59495d2f77b9dc14f3d
by ajaxglx: Allow depth-30 pbuffers to work without a depth-30 pixmap format
The backing pixmap needs to be big enough to hold depth-30 rendering, but the server doesn't necessarily have a depth-30 pixmap format. Just round up to the 32bpp format you'd be using anyway.
Fixes: mesa/mesa#3527 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6764>
|
 | src/glx/glx_pbuffer.c (diff) |
Commit
792b51713bf4050183ef3bcb9e8cab51886e89bc
by issor.oruamandroid: pan/bi: Use new disassembler
Fixes the following building error:
external/mesa/src/panfrost/bifrost/bi_pack.c:409:24: error: implicit declaration of function 'pan_pack_fma_nop_i32' is invalid in C99 [-Werror,-Wimplicit-function-declaration] return pan_pack_fma_nop_i32(clause, NULL, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:433:32: error: implicit declaration of function 'pan_pack_fma_fadd_f32' is invalid in C99 [-Werror,-Wimplicit-function-declaration] return pan_pack_fma_fadd_f32(clause, bundle.fma, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:433:32: note: did you mean 'pan_pack_fma_nop_i32'? external/mesa/src/panfrost/bifrost/bi_pack.c:409:24: note: 'pan_pack_fma_nop_i32' declared here return pan_pack_fma_nop_i32(clause, NULL, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:435:32: error: implicit declaration of function 'pan_pack_fma_fadd_v2f16' is invalid in C99 [-Werror,-Wimplicit-function-declaration] return pan_pack_fma_fadd_v2f16(clause, bundle.fma, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:435:32: note: did you mean 'pan_pack_fma_fadd_f32'? external/mesa/src/panfrost/bifrost/bi_pack.c:433:32: note: 'pan_pack_fma_fadd_f32' declared here return pan_pack_fma_fadd_f32(clause, bundle.fma, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:442:32: error: implicit declaration of function 'pan_pack_fma_fcmp_f32' is invalid in C99 [-Werror,-Wimplicit-function-declaration] return pan_pack_fma_fcmp_f32(clause, bundle.fma, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:442:32: note: did you mean 'pan_pack_fma_fadd_f32'? external/mesa/src/panfrost/bifrost/bi_pack.c:433:32: note: 'pan_pack_fma_fadd_f32' declared here return pan_pack_fma_fadd_f32(clause, bundle.fma, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:444:32: error: implicit declaration of function 'pan_pack_fma_fcmp_v2f16' is invalid in C99 [-Werror,-Wimplicit-function-declaration] return pan_pack_fma_fcmp_v2f16(clause, bundle.fma, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:444:32: note: did you mean 'pan_pack_fma_fadd_v2f16'? external/mesa/src/panfrost/bifrost/bi_pack.c:435:32: note: 'pan_pack_fma_fadd_v2f16' declared here return pan_pack_fma_fadd_v2f16(clause, bundle.fma, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:449:41: error: implicit declaration of function 'pan_pack_fma_rshift_and_i32' is invalid in C99 [-Werror,-Wimplicit-function-declaration] pan_pack_fma_rshift_and_i32(clause, bundle.fma, regs) : ^ external/mesa/src/panfrost/bifrost/bi_pack.c:449:41: note: did you mean 'pan_pack_fma_fadd_f32'? external/mesa/src/panfrost/bifrost/bi_pack.c:433:32: note: 'pan_pack_fma_fadd_f32' declared here return pan_pack_fma_fadd_f32(clause, bundle.fma, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:450:41: error: implicit declaration of function 'pan_pack_fma_lshift_and_i32' is invalid in C99 [-Werror,-Wimplicit-function-declaration] pan_pack_fma_lshift_and_i32(clause, bundle.fma, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:450:41: note: did you mean 'pan_pack_fma_rshift_and_i32'? external/mesa/src/panfrost/bifrost/bi_pack.c:449:41: note: 'pan_pack_fma_rshift_and_i32' declared here pan_pack_fma_rshift_and_i32(clause, bundle.fma, regs) : ^ external/mesa/src/panfrost/bifrost/bi_pack.c:453:41: error: implicit declaration of function 'pan_pack_fma_rshift_and_v2i16' is invalid in C99 [-Werror,-Wimplicit-function-declaration] pan_pack_fma_rshift_and_v2i16(clause, bundle.fma, regs) : ^ external/mesa/src/panfrost/bifrost/bi_pack.c:453:41: note: did you mean 'pan_pack_fma_fadd_v2f16'? external/mesa/src/panfrost/bifrost/bi_pack.c:435:32: note: 'pan_pack_fma_fadd_v2f16' declared here return pan_pack_fma_fadd_v2f16(clause, bundle.fma, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:454:41: error: implicit declaration of function 'pan_pack_fma_lshift_and_v2i16' is invalid in C99 [-Werror,-Wimplicit-function-declaration] pan_pack_fma_lshift_and_v2i16(clause, bundle.fma, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:454:41: note: did you mean 'pan_pack_fma_rshift_and_v2i16'? external/mesa/src/panfrost/bifrost/bi_pack.c:453:41: note: 'pan_pack_fma_rshift_and_v2i16' declared here pan_pack_fma_rshift_and_v2i16(clause, bundle.fma, regs) : ^ external/mesa/src/panfrost/bifrost/bi_pack.c:458:41: error: implicit declaration of function 'pan_pack_fma_rshift_and_v4i8' is invalid in C99 [-Werror,-Wimplicit-function-declaration] pan_pack_fma_rshift_and_v4i8(clause, bundle.fma, regs) : ^ external/mesa/src/panfrost/bifrost/bi_pack.c:459:41: error: implicit declaration of function 'pan_pack_fma_lshift_and_v4i8' is invalid in C99 [-Werror,-Wimplicit-function-declaration] pan_pack_fma_lshift_and_v4i8(clause, bundle.fma, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:459:41: note: did you mean 'pan_pack_fma_rshift_and_v4i8'? external/mesa/src/panfrost/bifrost/bi_pack.c:458:41: note: 'pan_pack_fma_rshift_and_v4i8' declared here pan_pack_fma_rshift_and_v4i8(clause, bundle.fma, regs) : ^ external/mesa/src/panfrost/bifrost/bi_pack.c:465:41: error: implicit declaration of function 'pan_pack_fma_rshift_or_i32' is invalid in C99 [-Werror,-Wimplicit-function-declaration] pan_pack_fma_rshift_or_i32(clause, bundle.fma, regs) : ^ external/mesa/src/panfrost/bifrost/bi_pack.c:465:41: note: did you mean 'pan_pack_fma_nop_i32'? external/mesa/src/panfrost/bifrost/bi_pack.c:409:24: note: 'pan_pack_fma_nop_i32' declared here return pan_pack_fma_nop_i32(clause, NULL, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:466:41: error: implicit declaration of function 'pan_pack_fma_lshift_or_i32' is invalid in C99 [-Werror,-Wimplicit-function-declaration] pan_pack_fma_lshift_or_i32(clause, bundle.fma, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:466:41: note: did you mean 'pan_pack_fma_rshift_or_i32'? external/mesa/src/panfrost/bifrost/bi_pack.c:465:41: note: 'pan_pack_fma_rshift_or_i32' declared here pan_pack_fma_rshift_or_i32(clause, bundle.fma, regs) : ^ external/mesa/src/panfrost/bifrost/bi_pack.c:469:41: error: implicit declaration of function 'pan_pack_fma_rshift_or_v2i16' is invalid in C99 [-Werror,-Wimplicit-function-declaration] pan_pack_fma_rshift_or_v2i16(clause, bundle.fma, regs) : ^ external/mesa/src/panfrost/bifrost/bi_pack.c:470:41: error: implicit declaration of function 'pan_pack_fma_lshift_or_v2i16' is invalid in C99 [-Werror,-Wimplicit-function-declaration] pan_pack_fma_lshift_or_v2i16(clause, bundle.fma, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:470:41: note: did you mean 'pan_pack_fma_rshift_or_v2i16'? external/mesa/src/panfrost/bifrost/bi_pack.c:469:41: note: 'pan_pack_fma_rshift_or_v2i16' declared here pan_pack_fma_rshift_or_v2i16(clause, bundle.fma, regs) : ^ external/mesa/src/panfrost/bifrost/bi_pack.c:474:41: error: implicit declaration of function 'pan_pack_fma_rshift_or_v4i8' is invalid in C99 [-Werror,-Wimplicit-function-declaration] pan_pack_fma_rshift_or_v4i8(clause, bundle.fma, regs) : ^ external/mesa/src/panfrost/bifrost/bi_pack.c:475:41: error: implicit declaration of function 'pan_pack_fma_lshift_or_v4i8' is invalid in C99 [-Werror,-Wimplicit-function-declaration] pan_pack_fma_lshift_or_v4i8(clause, bundle.fma, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:475:41: note: did you mean 'pan_pack_fma_rshift_or_v4i8'? external/mesa/src/panfrost/bifrost/bi_pack.c:474:41: note: 'pan_pack_fma_rshift_or_v4i8' declared here pan_pack_fma_rshift_or_v4i8(clause, bundle.fma, regs) : ^ external/mesa/src/panfrost/bifrost/bi_pack.c:482:41: error: implicit declaration of function 'pan_pack_fma_rshift_xor_i32' is invalid in C99 [-Werror,-Wimplicit-function-declaration] pan_pack_fma_rshift_xor_i32(clause, bundle.fma, regs) : ^ external/mesa/src/panfrost/bifrost/bi_pack.c:483:41: error: implicit declaration of function 'pan_pack_fma_lshift_xor_i32' is invalid in C99 [-Werror,-Wimplicit-function-declaration] pan_pack_fma_lshift_xor_i32(clause, bundle.fma, regs); ^ external/mesa/src/panfrost/bifrost/bi_pack.c:483:41: note: did you mean 'pan_pack_fma_rshift_xor_i32'? external/mesa/src/panfrost/bifrost/bi_pack.c:482:41: note: 'pan_pack_fma_rshift_xor_i32' declared here pan_pack_fma_rshift_xor_i32(clause, bundle.fma, regs) : ^ fatal error: too many errors emitted, stopping now [-ferror-limit=] 20 errors generated.
Fixes: f8fc2105 ("pan/bi: Use new disassembler") Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6765>
|
 | src/panfrost/Android.bifrost.mk (diff) |
Commit
183ca88a91d3e8addf015e56f4c2eb56e3f3ba0e
by issor.oruamandroid: pan/bi: Use new packing
Fixes the following building error:
external/mesa/src/panfrost/bifrost/bi_pack.c:26:10: fatal error: 'bi_generated_pack.h' file not found ^~~~~~~~~~~~~~~~~~~~~ 1 error generated.
Fixes: 2ff53879 ("pan/bi: Use new packing") Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6765>
|
 | src/panfrost/Android.bifrost.mk (diff) |
Commit
1b862716ddf6de92ba7811edf69e9990783050c7
by vleedisk_cache: Fix filename leak on error path.
Remove filename ralloc comment. filename is allocated by asprintf.
Clean up disk_cache_get dead code left over from 367ac07efcc8 ("disk_cache: move cache item loading code into disk_cache_load_item() helper").
Fix defect reported by Coverity Scan. Logically dead code (DEADCODE) dead_error_line: Execution cannot reach this statement: free(filename);
Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6738>
|
 | src/util/disk_cache_os.c (diff) |
 | src/util/disk_cache.c (diff) |
Commit
fcc506e52060ce0b2db756c7b07c70a781fac8c3
by eric+margeradesonsi: Remove unsigned comparison to zero.
cbuf was changed to unsigned in commit 3fec2f67c3d9 ("radeonsi: compact MRTs to save PS export memory space").
Fix defect reported by Coverity Scan.
Macro compares unsigned to 0 (NO_EFFECT) unsigned_compare: This greater-than-or-equal-to-zero comparison of an unsigned value is always true. cbuf >= 0U.
Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6739>
|
 | src/gallium/drivers/radeonsi/si_shader_llvm_ps.c (diff) |
Commit
ffbdbd631ad9aa391f5160bf50d6849d98bb6de4
by eric+margepanfrost: Delete debug allocated syncobj.
Fix defect reported by Coverity Scan.
Logically dead code (DEADCODE) dead_error_line: Execution cannot reach this statement: drmSyncobjDestroy(dev->fd, ...
Fixes: 64d6f56ad26f ("panfrost: Allocate syncobjs in panfrost_flush") Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6720>
|
 | src/gallium/drivers/panfrost/pan_job.c (diff) |
Commit
cde5b86a88c42c0139c0d685bd9844a7cee5dc4d
by eric+margeturnip: Release bo_mutex lock before potential error path.
Fix defect reported by Coverity Scan.
Missing unlock (LOCK) missing_unlock: Returning without unlocking queue->device->bo_mutex.
Suggested-by: Jonathan Marek <jonathan@marek.ca> Fixes: bea6290ca090 ("turnip: device global bo list") Signed-off-by: Vinson Lee <vlee@freedesktop.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6768>
|
 | src/freedreno/vulkan/tu_drm.c (diff) |
Commit
5805f5ab0161d597432adfa646557f2c8c25d278
by eric+margeglsl: take EXT_gpu_shader4 in to account when adding round
GL_EXT_gpu_shader4 adds truncate() and round() builtins.
Fixes: 12567de2be7 ("glsl: mark some builtins with correct glsl(es) version check") Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6731>
|
 | src/compiler/glsl/builtin_functions.cpp (diff) |
Commit
82c49a66c07a86e75efc490f542dfbf86078814e
by eric+margeswr: missing _BitScanForward64 on 32 bits win
the code does not compile on 32 bits systems for mingw we can use gcc intrinsics like the unix side for msvc a generic implementation is provided
Reviewed-by: Jose Fonseca <jfonseca@vmware.com> Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com> Reviewed-by: Jan Zielinski <jan.zielinski@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6705>
|
 | src/gallium/drivers/swr/rasterizer/common/os.h (diff) |
Commit
12b8ad8f21febed97ad6be401eeec4798fc748cd
by eric+margeswr: fix _BitScanForward64 on unix
it must apply to 64 bits types, and use the ctzll intrinsic instead of ctz
Reviewed-by: Jose Fonseca <jfonseca@vmware.com> Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com> Reviewed-by: Jan Zielinski <jan.zielinski@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6705>
|
 | src/gallium/drivers/swr/rasterizer/common/simdlib_256_avx.inl (diff) |
 | src/gallium/drivers/swr/rasterizer/core/frontend.cpp (diff) |
 | src/gallium/drivers/swr/rasterizer/core/rasterizer.cpp (diff) |
 | src/gallium/drivers/swr/rasterizer/jitter/streamout_jit.cpp (diff) |
 | src/gallium/drivers/swr/rasterizer/core/backend_singlesample.cpp (diff) |
 | src/gallium/drivers/swr/rasterizer/core/backend_impl.h (diff) |
 | src/gallium/drivers/swr/rasterizer/jitter/shader_lib/Scatter.cpp (diff) |
 | src/gallium/drivers/swr/rasterizer/common/intrin.h (diff) |
 | src/gallium/drivers/swr/rasterizer/common/os.h (diff) |
 | src/gallium/drivers/swr/rasterizer/core/api.cpp (diff) |
 | src/gallium/drivers/swr/rasterizer/core/binner.cpp (diff) |
 | src/gallium/drivers/swr/rasterizer/common/simdlib_128_avx.inl (diff) |
 | src/gallium/drivers/swr/rasterizer/core/clip.h (diff) |
 | src/gallium/drivers/swr/rasterizer/core/backend_sample.cpp (diff) |
 | src/gallium/drivers/swr/rasterizer/core/rasterizer_impl.h (diff) |
Commit
6a0d7f6316c60b480f4439ecef50de422a9175a6
by eric+margeetnaviv: shuffle some variant fields
Just to group together the parts that will get serialized when we have shader disk-cache.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6669>
|
 | src/gallium/drivers/etnaviv/etnaviv_compiler.h (diff) |
Commit
77af1ca690f4f49e305c095d97b9af798bfea307
by eric+margeetnaviv: add disk cache
Adds a shader disk-cache for shader variants. Note that builds with `-Dshader-cache=false` have no-op stubs with `disk_cache_create()` that returns NULL.
This shader disk-cache gets used when using NIR only. Helps to save about 1-2 minutes for a deqp run on gc2000.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6669>
|
 | src/gallium/drivers/etnaviv/Makefile.sources (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_shader.h (diff) |
 | src/gallium/drivers/etnaviv/meson.build (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_compiler.c (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_shader.c (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_compiler.h (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_screen.c (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_disk_cache.c |
 | src/gallium/drivers/etnaviv/etnaviv_debug.h (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_disk_cache.h |
Commit
090fc593b44d41e5613b04931bbf46d268fca666
by eric+margemesa: fix glUniform* when a struct contains a bindless sampler
Small example from #3271:
layout (bindless_sampler) uniform; struct SamplerSparse { sampler2D tex; vec4 size; [...] }; uniform SamplerSparse foo;
'foo' will be marked as bindless but we should only take the assign-as-GLuint64 path for 'tex'.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3271 Fixes: 990c8d15ac3 ("mesa: fix setting uniform variables for bindless samplers/images") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6730>
|
 | src/mesa/main/uniform_query.cpp (diff) |
Commit
ec13622ff4bae3818d27561d3b8ba1836556db40
by eric+margeradv: fix null descriptor for dynamic buffers
Fixes: c1ef225d183 "radv: handle NULL descriptors" Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6772>
|
 | src/amd/vulkan/radv_descriptor_set.c (diff) |
 | src/amd/vulkan/radv_cmd_buffer.c (diff) |
Commit
7b4eaac6a9c02c7e06b6633b6ad4cedef1833ef9
by eric+margeradv: fix vertex buffer null descriptors
Fixes: 0f1ead7b536 "radv: handle NULL vertex bindings" Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6773>
|
 | src/amd/vulkan/radv_cmd_buffer.c (diff) |
Commit
9aa86eb61aa64411b4c16d359467312f0f2729a0
by eric+margeglsl_type: Add packed to structure type comparison for hash map
Fixes: 659f333b3a4ff "glsl: add packed for struct types" Reviewed-by: Marek Olák <marek.olsak@amd.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6767>
|
 | src/compiler/glsl_types.cpp (diff) |
Commit
4656e682947621829f9297f01b2aaffb384bb762
by eric+margeradeonsi: fix user fence GPU address
User fence should have 4 QWORD memory space, I updated its CPU address but forgot to update GPU address.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3513 Fixes: 3d5bed0e883 "radeonsi: fix user fence space when MCBP is enabled" Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6776>
|
 | src/gallium/winsys/amdgpu/drm/amdgpu_cs.c (diff) |
Commit
be48cf804b34b3318d642a6d4f46a59c37908759
by maraeoamd/common: Store non-displayable DCC pitch.
For DRM planes with modifiers.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6783>
|
 | src/amd/common/ac_surface.h (diff) |
 | src/amd/common/ac_surface.c (diff) |
Commit
c6c1fa9a2638800155b31701190af7baccb0c18f
by maraeoradeonsi: Put retile map in separate buffers.
The retile maps are a software mechanism and hence very suceptible to change. As such I'd like to avoid making it part of the cross driver ABI.
Ideally we'd just use the cached tile info + a shader to avoid these buffers altogether.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6783>
|
 | src/amd/common/ac_surface.c (diff) |
 | src/gallium/drivers/radeonsi/si_compute_blit.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.h (diff) |
 | src/amd/common/ac_surface.h (diff) |
 | src/gallium/drivers/radeonsi/si_texture.c (diff) |
Commit
017ca86b2230b168f8a4fdffc2b56fd7d77df049
by maraeoradeonsi: Move display dcc dirty tracking to framebuffer emission.
To improve performance.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6783>
|
 | src/gallium/drivers/radeonsi/si_state.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.h (diff) |
Commit
6a1926035bd5d0fb39ab3c7de7662cc552a5dc02
by eric+margelima: allocate new bo for stream draw
In stream draws, the resource bo might be in use in a previous draw. Allocate a new one for the resource to avoid overwriting data in use.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com> Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Qiang Yu <yuq825@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6503>
|
 | src/gallium/drivers/lima/lima_resource.c (diff) |
Commit
95ee0ba41f0c53fe651b9fc12d57b1eb62eea539
by nunes.ericolima: fix vertex shader uniform buffer size
In some cases when switching shader programs, mesa does not switch the currently set pipe_constant_buffer, which keeps pointing to the one previously set. If the two shader programs have a different number of uniforms, the size of the constant buffer may be different and this needs to be considered while generating the next draw command. This patch fixes the uniform buffer creation in the lima vertex shader command to avoid an out of bounds memcpy due to a previously set pipe_constant_buffer.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com> Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6701>
|
 | src/gallium/drivers/lima/lima_draw.c (diff) |
 | src/gallium/drivers/lima/lima_context.h (diff) |
 | src/gallium/drivers/lima/ir/gp/nir.c (diff) |
Commit
7acf364131f59e201eddcc46492401ae0424b081
by eric+margepanfrost: Set modifier_constant to true for exported resources
Not actually seen in the wild but could theoretically be a problem for applications that explicitly import/export resources.
v2: Set it on exporting as well as importing (Daniel Stone)
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6717>
|
 | src/gallium/drivers/panfrost/pan_resource.c (diff) |
Commit
6064b8ee14319d5a2f24a1a1fac49d14a2cf6f1f
by eric+margepan/mdg: Return a bool from midgard_nir_lod_errata
To match other NIR passes.
Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6718>
|
 | src/panfrost/midgard/midgard_errata_lod.c (diff) |
 | src/panfrost/midgard/compiler.h (diff) |
Commit
7a348b43f2aafb82835c5e87977e3d7edd80851a
by eric+margepan/mdg: Use nir_shader_instructions_pass for nir_lod_errata
Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6718>
|
 | src/panfrost/midgard/midgard_errata_lod.c (diff) |
Commit
27516baa2aebe815dca011957d45e15f5b319fd6
by eric+margepan/mdg: Use nir_shader_instructions_pass for fdot2 lowering
Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6718>
|
 | src/panfrost/midgard/midgard_compile.c (diff) |
|
 | src/gallium/frontends/clover/core/resource.hpp (diff) |
 | src/gallium/frontends/clover/core/resource.cpp (diff) |
 | src/gallium/frontends/clover/api/transfer.cpp (diff) |
Commit
1e902102c491a5af0f3c129afbabc0ec7a4f6b29
by eric+margespirv: Access qualifiers are not a bitfield
They're an actual enum. My bad.
Fixes: de36b5b805be "nir/vtn: Add support for kernel images to SPIRV-to-NIR" Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6578>
|
 | src/compiler/spirv/spirv_to_nir.c (diff) |
Commit
3fc425b3559dcec5b3277e27d4a14e065a406982
by eric+margespirv: Plumb access qualifiers through from image types
In SPIR-V, the access qualifiers for an image are provided on the image type. Assuming no one swaps the types around on us (I think that should be illegal), this means we can reliably fetch the access qualifiers from the type itself. The ops which don't really have an easy-to-fetch type are the atomics because they use OpImageTexelPointer. However, those are only allowed on read/write images and that's the default.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6578>
|
 | src/compiler/spirv/spirv_to_nir.c (diff) |
Commit
e1fc23265f9f9e89a38f10c95289301563e0f957
by eric+margenir: Add a pass for lowering CL-style image ops to texture ops
In CL 1.2, images are required to be either read-only or write-only. We can always translate the read-only image ops to texture ops. In CL 2.0 (and an extension), the ability is added to have read-write images but sampling (with a sampler) is only allowed on read-only images. As long as we only lower read-only images to texture ops, everything should stay consistent.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6578>
|
 | src/compiler/nir/nir_lower_cl_images_to_tex.c |
 | src/compiler/nir/meson.build (diff) |
 | src/compiler/Makefile.sources (diff) |
 | src/compiler/nir/nir.h (diff) |
Commit
f63ffc18e79a94ff7a4c418341e644cc3894a03a
by eric+margeintel/fs/swsb: SCHEDULING_FENCE only emits SYNC_NOP
It's not really unordered in the sense that it can still stall on ordered things and we don't need a SYNC_NOP for that because it is a SYNC_NOP. However, it also doesn't count when computing instruction distances.
Fixes: 18e72ee2108 "intel/fs: Add FS_OPCODE_SCHEDULING_FENCE" Reviewed-by: Francisco Jerez <currojerez@riseup.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6781>
|
 | src/intel/compiler/brw_fs_scoreboard.cpp (diff) |
Commit
ecc19e9819c021d5e10246492284d8f68b019315
by eric+margeac/surface: Fix depth import on GFX6-GFX8.
Lets just do depth interop imports by convention between radv and radeonsi for now. The only thing using this should be Vulkan interop anyway.
CC: mesa-stable Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6617>
|
 | src/amd/common/ac_surface.c (diff) |
Commit
d78df70c2a85fd846d40b71b9e213122347bea1b
by eric+margeradv,radeonsi: Disable compression on interop depth images
If we want to use HTILE correctly we need to communicate extra stuff like clear colors. (Unlike DCC there is no HTILE FCE)
CC: mesa-stable Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6617>
|
 | src/gallium/drivers/radeonsi/si_texture.c (diff) |
 | src/amd/vulkan/radv_image.c (diff) |
Commit
0a84c595c21ab95eb6f2110472afdff3666a73c5
by eric+margeRevert "radv: set BIG_PAGE to improve performance on GFX10.3"
This reverts commit f4d861696dfb11dc2b6242a683a13238981f705f.
Turns out we cannot use BIG_PAGE with GTT and we can't tell when a buffer is spilled to GTT.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6726>
|
 | src/amd/vulkan/radv_cmd_buffer.c (diff) |
 | src/amd/vulkan/radv_image.c (diff) |
Commit
8ae4cec95faacc07a9747a550d20ccebb79920a8
by eric+margeRevert "radv: emit {CB,DB}_RMI_L2_CACHE_CONTROL at framebuffer time"
This reverts commit d6bc0f26c918a67ebf85595d06628e8092e271d0.
These registers are now constant.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6726>
|
 | src/amd/vulkan/si_cmd_buffer.c (diff) |
 | src/amd/vulkan/radv_cmd_buffer.c (diff) |
Commit
2aa5838730f66c39d9fa5fc6b8761e9326a1a9d0
by eric+margeRevert "panfrost: Drop implicit blend pooling"
This reverts commit dc7fbe114bac338e7075efdb325053ef41dad91c.
Fixes INSTR_INVALID_PC faults with the SuperTuxKart advanced rendering pipeline, which occurred when blend shader BOs were allocated far apart.
Fixes: dc7fbe114ba ("panfrost: Drop implicit blend pooling") Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6785>
|
 | src/gallium/drivers/panfrost/pan_blend_cso.c (diff) |
 | src/gallium/drivers/panfrost/pan_cmdstream.c (diff) |
 | src/gallium/drivers/panfrost/pan_blend.h (diff) |
Commit
66f25dd210f4819136a23890173f93b89a4d7779
by alyssa.rosenzweigpanfrost: gen_pack: Minor formatting improvement
Escape the \ in pan_pack() so the end result is actually a multi-line macro.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/gen_pack.py (diff) |
Commit
ddd82c3ab8ced10b99ea87c444d4c0fa19f2fee6
by alyssa.rosenzweigpanfrost: gen_pack: Fix __gen_unpack_uint()
The mask should be a 64-bit value and we should promote cl bytes to u64 before shifting them.
Fixes: 75cc5b8c2922 ("panfrost: Adopt gen_pack_header.py via v3d") Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/gen_pack.py (diff) |
Commit
62c0ef06c83bf380a64dd0bb45f6a403a57c8537
by alyssa.rosenzweigpanfrost: gen_pack: Add pan_{unpack,print}() helpers
And use them in pandecode.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/gen_pack.py (diff) |
 | src/panfrost/lib/decode.c (diff) |
Commit
fa7d0974fb9fbfba47632999c3ad9176759a2815
by alyssa.rosenzweigpanfrost: gen_pack: Move the group get_length() logic to its own method
So we can re-use it elsewhere.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/gen_pack.py (diff) |
Commit
c7a10193d42bdc01a9fbe771f3afb927d4f1640d
by alyssa.rosenzweigpanfrost: gen_pack: Add the aggregate concept
Panfrost descriptors are big and are usually built from a combination of sub-descriptors. On top of that, layout of sub-descriptors might vary depending on the architecture version. Since unions are not really an option (too complex), here is a thin abstraction layer allowing us to manipulate aggregates in their packed format. Each aggregate is formed of one or more sections that are meant to be packed/unpacked/printed separately. Section overlapping is allowed to facilitate handling of descriptor variants.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/gen_pack.py (diff) |
Commit
1b27817f17551a24a24692f4a2821d539de00a3d
by alyssa.rosenzweigpanfrost: gen_pack: Allow empty structs
This is useful if we want to declare padding sections which can be packed (filled with zeros) and unpacked (checked for non zero entries).
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/gen_pack.py (diff) |
Commit
718b521f5694e1e6d25f383bc6a334f4e2a42562
by alyssa.rosenzweigpanfrost: gen_pack: Add an align() modifier
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/gen_pack.py (diff) |
Commit
51d5d44953ed7e3ce0753c2c1671f7b7916ed4aa
by alyssa.rosenzweigpanfrost: gen_pack: Add a log2 modifier
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Suggested-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/gen_pack.py (diff) |
Commit
fd0941c5733048bb5ef33a646302bdb9aaf7dec0
by alyssa.rosenzweigpanfrost: gen_pack: Allow enum/define values expressed in hexadecimal
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/gen_pack.py (diff) |
Commit
6249ae79d387b3599295cb7eb2824f9a432b7def
by alyssa.rosenzweigpanfrost: decode: Make the indentation consistent with auto-generated print helpers
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/decode.c (diff) |
Commit
670e818f906ce932695c4a409f0572a01a7c0b5b
by alyssa.rosenzweigpanfrost: decode: Rework the DUMP_{CL,ADDR}() macros
We don't need to pass the indentation level explicitly if we use pandecode_log() instead of fprintf(). This helps keeping a consistent indentation across descriptors.
While at it, let's rework those macros to allow creating titles from a format string.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/decode.c (diff) |
Commit
aa2670c7fb8251ff0525452c61d07de8469d3a90
by alyssa.rosenzweigpanfrost: decode: Add a macro to dump unpacked descriptors
And use it where it makes sense.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/decode.c (diff) |
Commit
706974ce1737e4fae6cc2d2ab6967c4b462d439c
by alyssa.rosenzweigpanfrost: decode: Use pan_{unpack,print}() when applicable
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/decode.c (diff) |
Commit
3a06fc3d345f745892eddd842389579907224a79
by alyssa.rosenzweigpanfrost: XML-ify the local storage descriptor
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/gallium/drivers/panfrost/pan_cmdstream.c (diff) |
 | src/panfrost/lib/decode.c (diff) |
 | src/panfrost/bifrost/test/bi_submit.c (diff) |
 | src/panfrost/lib/midgard.xml (diff) |
 | src/gallium/drivers/panfrost/pan_mfbd.c (diff) |
 | src/gallium/drivers/panfrost/pan_sfbd.c (diff) |
 | src/panfrost/include/panfrost-job.h (diff) |
Commit
76096c723ae719bd3032dc27844f26f3bf5166c8
by alyssa.rosenzweigpanfrost: Clarify what TILED mode is
We have 2 tile modes: tiled linear and tiled U-interleaved. Let's rename the existing value to clarify that.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/gallium/drivers/panfrost/pan_mfbd.c (diff) |
 | src/gallium/drivers/panfrost/pan_sfbd.c (diff) |
 | src/panfrost/lib/midgard.xml (diff) |
Commit
fb95729b6953fdb3f920c71b44140291eafe3216
by alyssa.rosenzweigpanfrost: Add Tiled linear mode to the Block Format enum
Add it for completeness.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/midgard.xml (diff) |
Commit
e855698ddd1e56dbd9c4d9f741190ba3e9456426
by alyssa.rosenzweigpanfrost: XML-ify the midgard tiler descriptor
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/gallium/drivers/panfrost/pan_sfbd.c (diff) |
 | src/gallium/drivers/panfrost/pan_context.c (diff) |
 | src/gallium/drivers/panfrost/pan_job.c (diff) |
 | src/gallium/drivers/panfrost/pan_mfbd.c (diff) |
 | src/panfrost/include/panfrost-job.h (diff) |
 | src/gallium/drivers/panfrost/pan_context.h (diff) |
 | src/panfrost/lib/decode.c (diff) |
 | src/panfrost/lib/midgard.xml (diff) |
Commit
95eb7d9a343862ce92776fb7b16153d5e8f8ae49
by alyssa.rosenzweigpanfrost: XML-ify the single target framebuffer descriptor
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/gallium/drivers/panfrost/pan_sfbd.c (diff) |
 | src/panfrost/lib/midgard.xml (diff) |
 | src/gallium/drivers/panfrost/pan_job.c (diff) |
 | src/panfrost/include/panfrost-job.h (diff) |
 | src/panfrost/lib/decode.c (diff) |
Commit
efce73d99d0e0299dd4f3983bc610f6d1828761c
by alyssa.rosenzweigpanfrost: XML-ify the bifrost tiler descriptors
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/gallium/drivers/panfrost/pan_job.h (diff) |
 | src/gallium/drivers/panfrost/pan_cmdstream.c (diff) |
 | src/panfrost/lib/midgard.xml (diff) |
 | src/panfrost/include/panfrost-job.h (diff) |
 | src/gallium/drivers/panfrost/pan_mfbd.c (diff) |
 | src/panfrost/lib/decode.c (diff) |
 | src/gallium/drivers/panfrost/pan_job.c (diff) |
Commit
5d5f7552a52d69825659e1715491db2a7477d839
by alyssa.rosenzweigpanfrost: XML-ify the multi-target framebuffer descriptors
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/gallium/drivers/panfrost/pan_mfbd.c (diff) |
 | src/panfrost/lib/midgard.xml (diff) |
 | src/gallium/drivers/panfrost/pan_job.c (diff) |
 | src/panfrost/lib/pan_format.c (diff) |
 | src/panfrost/include/panfrost-job.h (diff) |
 | src/panfrost/lib/decode.c (diff) |
 | src/panfrost/lib/pan_texture.h (diff) |
Commit
eb923548c5120a818e9dcb89e31db5f43766418f
by alyssa.rosenzweigpanfrost: XML-ify the job header descriptor
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/midgard.xml (diff) |
 | src/panfrost/lib/pan_scoreboard.h (diff) |
 | src/panfrost/bifrost/test/bi_submit.c (diff) |
 | src/gallium/drivers/panfrost/pan_fragment.c (diff) |
 | src/panfrost/include/panfrost-job.h (diff) |
 | src/panfrost/lib/pan_scoreboard.c (diff) |
 | src/panfrost/lib/decode.c (diff) |
Commit
9121e7daaf71d2acf8a10c85e06cd977556bdcbb
by alyssa.rosenzweigpanfrost: XML-ify the write value job descriptor
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/pan_scoreboard.c (diff) |
 | src/panfrost/lib/decode.c (diff) |
 | src/panfrost/include/panfrost-job.h (diff) |
 | src/panfrost/lib/midgard.xml (diff) |
 | src/panfrost/bifrost/test/bi_submit.c (diff) |
Commit
89fafe9e926b820912d231678f11402476231158
by alyssa.rosenzweigpanfrost: XML-ify the fragment job descriptor
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/midgard.xml (diff) |
 | src/gallium/drivers/panfrost/pan_fragment.c (diff) |
 | src/panfrost/lib/decode.c (diff) |
 | src/panfrost/include/panfrost-job.h (diff) |
 | src/panfrost/lib/gen_pack.py (diff) |
Commit
54d716a0342fb7aa3f65cf5ce0ab53bf50408704
by alyssa.rosenzweigpanfrost: Rename the Blend dither disable flag
It's actually encoding the "Round to FB precision" information.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/pan_blit.c (diff) |
 | src/panfrost/lib/midgard.xml (diff) |
 | src/gallium/drivers/panfrost/pan_cmdstream.c (diff) |
Commit
d289209ea68f47411c15a7c46fa2d8c2d1a4a61b
by alyssa.rosenzweigpanfrost: XML-ify the compute job descriptor
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/gallium/drivers/panfrost/pan_cmdstream.c (diff) |
 | src/panfrost/bifrost/test/bi_submit.c (diff) |
 | src/panfrost/lib/decode.c (diff) |
 | src/panfrost/include/panfrost-job.h (diff) |
 | src/gallium/drivers/panfrost/pan_compute.c (diff) |
 | src/gallium/drivers/panfrost/pan_cmdstream.h (diff) |
 | src/panfrost/lib/pan_blit.c (diff) |
 | src/gallium/drivers/panfrost/pan_context.c (diff) |
 | src/panfrost/lib/midgard.xml (diff) |
Commit
6b923037726beb613179f33986176bc407ca91b0
by alyssa.rosenzweigpanfrost: Avoid copying job descriptors around when we can
Job descriptors are written section by section and are never modified after them been emitted. Let's avoid copying things around by allocating descriptors upfront and letting the scoreboard logic only write the header section.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/gallium/drivers/panfrost/pan_context.c (diff) |
 | src/panfrost/lib/pan_scoreboard.h (diff) |
 | src/panfrost/lib/pan_scoreboard.c (diff) |
 | src/gallium/drivers/panfrost/pan_cmdstream.h (diff) |
 | src/gallium/drivers/panfrost/pan_compute.c (diff) |
 | src/panfrost/lib/pan_blit.c (diff) |
 | src/gallium/drivers/panfrost/pan_cmdstream.c (diff) |
Commit
b1c3f63b8dac12b48196e6514157b62e1b98ed93
by alyssa.rosenzweigpanfrost: decode: Misc formatting improvements
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
|
 | src/panfrost/lib/decode.c (diff) |
Commit
2228835fb55225c68f059f86bdd64f81bcb92c74
by eric+margeradv,aco: fix reading primitive ID in FS after TES
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Cc: mesa-stable Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3530 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6760>
|
 | src/amd/vulkan/radv_nir_to_llvm.c (diff) |
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
fc6df020e3b3ccbd46994986da5f24611a971927
by pellouxgallium: add PIPE_CAP_MAX_TEXTURE_MB
Allows driver to override the default value (1024) from mesa.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6754>
|
 | src/gallium/include/pipe/p_defines.h (diff) |
 | src/gallium/drivers/radeonsi/si_get.c (diff) |
 | docs/gallium/screen.rst (diff) |
 | src/gallium/auxiliary/util/u_screen.c (diff) |
 | src/mesa/state_tracker/st_extensions.c (diff) |
|
 | src/gallium/drivers/radeonsi/si_get.c (diff) |
 | src/util/00-mesa-defaults.conf (diff) |
Commit
b73e165a04c02aac8c2c7c1b5c34ae7c67bb7187
by pellouxradeonsi: reduce PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE value
The new value (64 MB) is a compromise: - the old value was very large (max_alloc & 0xffffffff) and caused https://gitlab.freedesktop.org/mesa/mesa/-/issues/3301 - amdgpu-pro allows 512MB, nvidia 64MB
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6754>
|
 | src/gallium/drivers/radeonsi/si_get.c (diff) |
|
 | src/gallium/drivers/radeonsi/si_get.c (diff) |
Commit
ec2185c5984b66fb9cae33bd561cf35096c9861e
by eric+margeaco: keep track of temporaries' regclasses in the Program
A future change will switch the liveness sets to bit vectors, which don't contain regclass information.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6733>
|
 | src/amd/compiler/aco_optimizer.cpp (diff) |
 | src/amd/compiler/aco_instruction_selection_setup.cpp (diff) |
 | src/amd/compiler/aco_lower_to_cssa.cpp (diff) |
 | src/amd/compiler/aco_ir.h (diff) |
 | src/amd/compiler/aco_reduce_assign.cpp (diff) |
 | src/amd/compiler/aco_register_allocation.cpp (diff) |
 | src/amd/compiler/aco_builder_h.py (diff) |
 | src/amd/compiler/aco_spill.cpp (diff) |
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
 | src/amd/compiler/aco_lower_phis.cpp (diff) |
Commit
d2c18b7bf37f6b4fd7b0a2f7cf2fc97c5305ea4c
by eric+margeaco: use bit vectors for liveness sets
This seems to be much faster than hash sets. When compiling pipelines from 5 games, live_var_analysis takes about a third the time it used to and fossilize-replay is ~1.77% faster.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6733>
|
 | src/amd/compiler/aco_live_var_analysis.cpp (diff) |
 | src/amd/compiler/aco_lower_to_cssa.cpp (diff) |
 | src/amd/compiler/aco_validate.cpp (diff) |
 | src/amd/compiler/aco_util.h (diff) |
 | src/amd/compiler/aco_register_allocation.cpp (diff) |
 | src/amd/compiler/aco_ir.h (diff) |
Commit
2b99e15d0a6440edc0a616b031376a025247ece4
by eric+margeradv: fix transform feedback crashes if pCounterBufferOffsets is NULL
From the Vulkan 1.2.154 spec: "If pCounterBufferOffsets is NULL, then it is assumed the offsets are zero."
Fix new CTS dEQP-VK.transform_feedback.simple.backward_dependency_no_offset_array.
CC: mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6798>
|
 | src/amd/vulkan/radv_cmd_buffer.c (diff) |
Commit
c3ae82be247df6d12113b04edc6aa72e7a408119
by eric+margeci: Add "is scheduled pipeline" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
|
 | .gitlab-ci.yml (diff) |
Commit
ac56d6699270c0027563c3311fa8a5b418b481d0
by eric+margeci: Add "is master branch of main project" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
|
 | .gitlab-ci.yml (diff) |
Commit
f79ae945380f01470e1cc7dc17a08e65dd4fd723
by eric+margeci: Add "is pre-merge pipeline for Marge Bot" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
|
 | .gitlab-ci.yml (diff) |
Commit
a33026ee7c70721e18bcb36dcfd1d479baa9b666
by eric+margeci: Add "is post-merge pipeline, not for Marge Bot" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
|
 | .gitlab-ci.yml (diff) |
Commit
24f5329e2a55733cc3140b21fb71a18a319b83d7
by eric+margeci: Add "is forked branch or pre-merge pipeline" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
|
 | .gitlab-ci.yml (diff) |
|
 | .gitlab-ci.yml (diff) |
Commit
b47f1bbff98ef94db4eccdbff987bb12836e6881
by eric+margeci: Add "is post-merge pipeline" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
|
 | .gitlab-ci.yml (diff) |
Commit
0fcb8b33c573914540e1ef46b6c508c05be87462
by eric+margeci: Add "is pre-merge pipeline" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
|
 | .gitlab-ci.yml (diff) |
|
 | .gitlab-ci.yml (diff) |
Commit
8cb450f769b7a9cc7b82df4eeb8235e379803f06
by eric+margeci: Always use CI_PROJECT_NAMESPACE instead of CI_PROJECT_PATH
And always check it first.
Cleanup for consistency.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
|
 | .gitlab-ci.yml (diff) |
Commit
efec576405db8794a292b2123a7d09fae1f3b339
by eric+margeci: Prevent pages job from running in pre-merge pipelines
Since pre-merge pipelines run in the "mesa" namespace now, the rule would have created the job if the source branch was named "master" (and the job might have updated the public website).
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
|
 | .gitlab-ci.yml (diff) |
Commit
0836e90418e11371a49f6c1004a8039a44392ea7
by eric+margeci: Don't create test-docs job if the pages one exists in the pipeline
It's redundant in that case.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
|
 | .gitlab-ci.yml (diff) |
Commit
3808fa40b4e89e1f3c90ae05f2b44142f4cb23ed
by eric+margeradv: add a helper for loading meta descriptors
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6202>
|
 | src/amd/vulkan/radv_meta_buffer.c (diff) |
 | src/amd/vulkan/radv_meta_clear.c (diff) |
 | src/amd/vulkan/radv_meta.h (diff) |
 | src/amd/vulkan/radv_meta.c (diff) |
 | src/amd/vulkan/radv_query.c (diff) |
Commit
05b6612b4ec7c5386d4840d251d76123d4cee0c3
by eric+margeradv: do not lower UBO/SSBO access to offsets
Use nir_lower_explicit_io instead of lowering to offsets. Extra (useless) additions are removed by lowering load_vulkan_descriptor to vec2(src.x, 0).
fossils-db (Navi): Totals from 18236 (13.21% of 138013) affected shaders: SGPRs: 1172766 -> 1168278 (-0.38%); split: -0.89%, +0.50% VGPRs: 940156 -> 952232 (+1.28%); split: -0.08%, +1.37% SpillSGPRs: 30286 -> 31109 (+2.72%); split: -0.78%, +3.50% SpillVGPRs: 1893 -> 1909 (+0.85%) CodeSize: 87910396 -> 88113592 (+0.23%); split: -0.35%, +0.58% Scratch: 819200 -> 823296 (+0.50%) MaxWaves: 205535 -> 202102 (-1.67%); split: +0.05%, -1.72% Instrs: 17052527 -> 17113484 (+0.36%); split: -0.32%, +0.67% Cycles: 670794876 -> 669084540 (-0.25%); split: -0.38%, +0.13% VMEM: 5274728 -> 5388556 (+2.16%); split: +3.10%, -0.94% SMEM: 1196146 -> 1165850 (-2.53%); split: +2.06%, -4.60% VClause: 381463 -> 399217 (+4.65%); split: -1.08%, +5.73% SClause: 666216 -> 631135 (-5.27%); split: -5.44%, +0.18% Copies: 1292720 -> 1289318 (-0.26%); split: -1.28%, +1.01% Branches: 467336 -> 473028 (+1.22%); split: -0.67%, +1.89% PreSGPRs: 766459 -> 772175 (+0.75%); split: -0.53%, +1.28% PreVGPRs: 819746 -> 825327 (+0.68%); split: -0.05%, +0.73%
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6202>
|
 | src/amd/vulkan/radv_meta.c (diff) |
 | src/amd/vulkan/radv_shader.c (diff) |
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
d78e7b7aee8c2da6235820bd4790c5ddbf39febd
by eric+margegallium/auxiliary/vl: Odd Dimensions are failing
Issue: While running the tast for odd resolutions there are green lines observed in the dumped image. The resolution is 321x241, the extra 1 pixel data is missing in the image. The reason for this is in the post processing when we adjust the size of height and width we are dividing it by 2.
Fix: To resolve this issue we first need to align it to 2 and then divide by 2 to get the required values. Once we do this we will have proper data in the dumped image and missing pixel data will be available.
Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6795>
|
 | src/gallium/auxiliary/vl/vl_video_buffer.h (diff) |
Commit
eb3199db3e558672a332f9fcf26f90b9c3c04498
by eric+marger600/sfn: make number of source components a local variable
There is no need to keep that value as a member and it irritates Coverity.
Fixes: 688680decce9 r600/nir: fetch sources and split uniforms before emittting alu instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6787>
|
 | src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.h (diff) |
 | src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.cpp (diff) |
Commit
07cb38f0d2fb9aae8d5c62875c69f9c3262defb9
by eric+marger600/sfn: Fix component count for fdph
The second parameter has four components, and this is the one that would be copied when splitting constants.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6787>
|
 | src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.cpp (diff) |
Commit
0a3f92bcc663e94afc7e69e8c7d2395c5643ca6d
by eric+marger600/sfn: Fix typo in comment
Thanks Stanislav Jakúbek for ponting it out.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6787>
|
 | src/gallium/drivers/r600/sfn/sfn_shader_base.cpp (diff) |
Commit
245f619411b5f9b10a11f0c68645f5eae0586d85
by eric+margegallium: Parse packed HEVC SPS encode header for crop parameters
The crop / conformance window parameters are set by ffmpeg but they only seem to be made available in packed headers. This commit copies the H265 header parsing code from st/omx (planning in the future to move this code to a common place to be shared by the different state trackers) in order to grab the crop parameters
Signed-off-by: Thong Thai <thong.thai@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4184>
|
 | src/gallium/frontends/va/picture.c (diff) |
 | src/gallium/include/pipe/p_video_state.h (diff) |
 | src/gallium/frontends/va/picture_hevc_enc.c (diff) |
 | src/gallium/frontends/va/va_private.h (diff) |
 | src/gallium/frontends/va/config.c (diff) |
Commit
7b9414f23f3d74bf460b3e3ff82055f644bd1aed
by eric+margeradeon: Pass HEVC encode crop parameters to the encoder
Signed-off-by: Thong Thai <thong.thai@amd.com> Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2351 Reviewed-by: Leo Liu <leo.liu@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4184>
|
 | src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c (diff) |
 | src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c (diff) |
 | src/gallium/drivers/radeon/radeon_vcn_enc.c (diff) |
 | src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c (diff) |
 | src/gallium/drivers/radeon/radeon_uvd_enc.c (diff) |
Commit
9a4daac0bbf8233f7f1fe5a65aef882f13dccd2e
by eric+margefrontends/va: Enabled packed headers for H.264 encoder
Signed-off-by: Thong Thai <thong.thai@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4184>
|
 | src/gallium/frontends/va/config.c (diff) |
Commit
26a83bef7b98899913b19ddb7efadaa1f435b25f
by eric+margegallium/auxiliary/vl: Include src region in scale_y calculation
Signed-off-by: Thong Thai <thong.thai@amd.com> Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3521 Reviewed-by: Leo Liu <leo.liu@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6736>
|
 | src/gallium/auxiliary/vl/vl_compositor_cs.c (diff) |
Commit
54b9013e4c83a74b2806195bc41d774ca060112b
by ajaxwsi/x11: Create a present queue for VK_PRESENT_MODE_FIFO_RELAXED_KHR
This activates the target_msc computation that we'd otherwise be using if we were just FIFO; otherwise we'd always set target_msc = 0 and it'd act like IMMEDIATE.
Fixes: 77d25627933 "wsi/x11: Hook up VK_PRESENT_MODE_FIFO_RELAXED_KHR" Fixes: mesa/mesa#3512 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6804>
|
 | src/vulkan/wsi/wsi_common_x11.c (diff) |
Commit
cc3bf00cc26ddb991b4036a9911299e7d122115b
by eric+margeintel/compiler: fixup Gen12 workaround for array sizes
We didn't handle the case of NULL images/textures for which we should return 0.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 397ff2976ba281 ("intel: Implement Gen12 workaround for array textures of size 1") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3522 Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6729>
|
 | src/intel/compiler/brw_nir_clamp_image_1d_2d_array_sizes.c (diff) |
Commit
e80758405c770cb2b47059d9bd336d9115c7899e
by eric+margeturnip: Add kgsl backend
Lacking a bit around fences and wsi integration, but there's enough here to actually drive the GPU.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4479>
|
 | src/freedreno/vulkan/meson.build (diff) |
 | src/freedreno/vulkan/tu_kgsl.c |
 | src/freedreno/vulkan/msm_kgsl.h |
 | meson.build (diff) |
 | meson_options.txt (diff) |
|
 | src/freedreno/vulkan/tu_kgsl.c (diff) |
Commit
ade72e677b3e3d15221c0097c76573c36e47d0f8
by eric+margest/mesa: Deal with empty textures/buffers in semaphore wait/signal.
The actual texture might not have been created yet.
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3257 CC: mesa-stable Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6788>
|
 | src/mesa/state_tracker/st_cb_semaphoreobjects.c (diff) |
Commit
a5967f308ca9f67a83ba73167536c7f96a27500d
by vleepan/bi: Fix typo.
Fix defect reported by Coverity Scan.
Same on both sides (CONSTANT_EXPRESSION_RESULT) pointless_expression: The expression src0_u8 || src0_u8 does not accomplish anything because it evaluates to either of its identical operands, src0_u8.
Fixes: 2ff53879f214 ("pan/bi: Use new packing") Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6780>
|
 | src/panfrost/bifrost/bi_pack.c (diff) |
Commit
3022cf3bac5ac648f918aafe111e3308cd5af793
by vleeglsl: Initialize ir_constant member const_elements in all constructors.
Fix defects reported by Coverity Scan.
Uninitialized pointer field (UNINIT_CTOR) uninit_member: Non-static class member const_elements is not initialized in this constructor nor in any functions that it calls.
Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6770>
|
 | src/compiler/glsl/ir.cpp (diff) |
|
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
Commit
c5277f035edec6b1d3724da5fbb01c4759279a37
by eric+margeradeonsi: don't lower pack for better 16-bit vectorization
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
d3c63d6f606d9cd464e247c24c0c6211345d6a55
by eric+margeradeonsi: set flags for FP16 in shaders
v2: remove the enablement code
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> (v1) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
|
 | src/gallium/drivers/radeonsi/si_get.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.c (diff) |
Commit
98a52fecdaaac073943fb0f1322a29d01bfeb9c7
by eric+margeradeonsi: implement 16-bit FS color outputs
This removes type conversions from 16 bits to 32 bits in the main function and then back to 16 bits in the epilog.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
|
 | src/gallium/drivers/radeonsi/si_shader_llvm_ps.c (diff) |
 | src/amd/llvm/ac_llvm_build.c (diff) |
 | src/amd/llvm/ac_llvm_build.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm.c (diff) |
Commit
e823742e9fd5f7e6838b19538fc063ac59fc67e1
by eric+margeradeonsi: vectorize IO for better ALU vectorization
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
6702e542cf1df4de65c4329731fe8c461c321e48
by eric+margeradeonsi: don't scalarize 16-bit vec2 ALU opcodes
prerequisite for enabling vectorization, so that we don't scalarize and vectorize at the same time, causing an infinite loop.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
|
 | src/gallium/drivers/r600/r600_blit.c (diff) |
 | src/gallium/drivers/r600/r600_query.c (diff) |
 | src/gallium/drivers/freedreno/freedreno_resource.c (diff) |
 | src/gallium/drivers/radeon/radeon_video.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
 | src/gallium/frontends/xa/xa_context.c (diff) |
 | src/gallium/frontends/xvmc/subpicture.c (diff) |
 | src/gallium/drivers/svga/svga_swtnl_backend.c (diff) |
 | src/gallium/winsys/sw/dri/dri_sw_winsys.c (diff) |
 | src/gallium/drivers/svga/svga_winsys.h (diff) |
 | src/gallium/frontends/va/surface.c (diff) |
 | src/gallium/drivers/r600/r600_test_dma.c (diff) |
 | src/gallium/drivers/llvmpipe/lp_surface.c (diff) |
 | src/gallium/drivers/r600/r600_buffer_common.c (diff) |
 | src/gallium/frontends/omx/tizonia/h264einport.c (diff) |
 | src/gallium/auxiliary/indices/u_primconvert.c (diff) |
 | src/gallium/drivers/svga/svga_pipe_query.c (diff) |
 | src/gallium/tests/graw/graw_util.h (diff) |
 | src/gallium/drivers/r300/r300_screen_buffer.c (diff) |
 | src/gallium/drivers/svga/svga_draw_elements.c (diff) |
 | src/gallium/tests/trivial/quad-tex.c (diff) |
 | src/gallium/drivers/vc4/vc4_resource.c (diff) |
 | src/gallium/tests/trivial/compute.c (diff) |
 | src/gallium/frontends/nine/nine_buffer_upload.c (diff) |
 | src/gallium/drivers/radeon/radeon_vce.c (diff) |
 | src/gallium/auxiliary/util/u_dump_defines.c (diff) |
 | src/gallium/winsys/svga/drm/vmw_buffer.c (diff) |
 | src/gallium/drivers/r600/compute_memory_pool.c (diff) |
 | src/gallium/drivers/r600/eg_debug.c (diff) |
 | src/gallium/drivers/swr/swr_screen.cpp (diff) |
 | src/gallium/drivers/nouveau/nv30/nv30_fragprog.c (diff) |
 | src/gallium/drivers/nouveau/nouveau_buffer.c (diff) |
 | src/gallium/drivers/r600/radeon_uvd.c (diff) |
 | src/gallium/winsys/svga/drm/vmw_query.c (diff) |
 | src/mesa/state_tracker/st_cb_readpixels.c (diff) |
 | src/gallium/drivers/r300/r300_render.c (diff) |
 | src/gallium/drivers/virgl/virgl_query.c (diff) |
 | src/gallium/winsys/svga/drm/vmw_screen_svga.c (diff) |
 | src/gallium/drivers/nouveau/nv50/nv50_transfer.c (diff) |
 | src/gallium/tests/graw/gs-test.c (diff) |
 | src/gallium/drivers/softpipe/sp_tex_tile_cache.c (diff) |
 | src/gallium/drivers/svga/svga_resource_buffer.c (diff) |
 | src/gallium/drivers/r600/r600_pipe.c (diff) |
 | src/gallium/drivers/llvmpipe/lp_state_cs.c (diff) |
 | src/mesa/state_tracker/st_cb_copyimage.c (diff) |
 | src/gallium/drivers/r600/r600_texture.c (diff) |
 | src/gallium/drivers/softpipe/sp_texture.c (diff) |
 | src/gallium/winsys/radeon/drm/radeon_drm_bo.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.c (diff) |
 | src/gallium/drivers/radeonsi/si_buffer.c (diff) |
 | src/mesa/state_tracker/st_cb_drawpixels.c (diff) |
 | src/gallium/auxiliary/vl/vl_mpeg12_decoder.c (diff) |
 | src/gallium/auxiliary/util/u_transfer_helper.c (diff) |
 | src/gallium/auxiliary/vl/vl_compositor_cs.c (diff) |
 | src/gallium/drivers/nouveau/nouveau_winsys.h (diff) |
 | src/gallium/drivers/softpipe/sp_state_sampler.c (diff) |
 | src/gallium/include/frontend/sw_winsys.h (diff) |
 | src/gallium/drivers/radeonsi/si_state.c (diff) |
 | src/gallium/drivers/r600/r600_state_common.c (diff) |
 | src/gallium/drivers/radeon/radeon_winsys.h (diff) |
 | src/gallium/auxiliary/vl/vl_vertex_buffers.c (diff) |
 | src/gallium/drivers/r600/radeon_video.c (diff) |
 | src/gallium/winsys/amdgpu/drm/amdgpu_cs.c (diff) |
 | src/mesa/state_tracker/st_cb_texture.c (diff) |
 | src/mesa/state_tracker/st_cb_bitmap.c (diff) |
 | src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c (diff) |
 | src/gallium/tests/graw/vs-test.c (diff) |
 | src/gallium/drivers/radeon/radeon_vcn_enc.c (diff) |
 | src/gallium/frontends/glx/xlib/xm_api.c (diff) |
 | src/gallium/auxiliary/util/u_vbuf.c (diff) |
 | src/gallium/auxiliary/util/u_inlines.h (diff) |
 | src/gallium/drivers/radeon/radeon_uvd.c (diff) |
 | src/gallium/drivers/softpipe/sp_compute.c (diff) |
 | src/gallium/drivers/v3d/v3d_resource.c (diff) |
 | src/gallium/frontends/vdpau/bitmap.c (diff) |
 | src/gallium/auxiliary/util/u_suballoc.c (diff) |
 | src/gallium/drivers/svga/svga_pipe_streamout.c (diff) |
 | src/gallium/drivers/llvmpipe/lp_state_sampler.c (diff) |
 | src/gallium/auxiliary/util/u_tests.c (diff) |
 | src/gallium/winsys/svga/drm/vmw_surface.h (diff) |
 | src/gallium/drivers/radeonsi/si_test_dma.c (diff) |
 | src/gallium/auxiliary/util/u_threaded_context.c (diff) |
 | src/gallium/drivers/i915/i915_resource_texture.c (diff) |
 | src/gallium/drivers/radeon/radeon_vcn_dec.c (diff) |
 | src/gallium/drivers/lima/lima_resource.c (diff) |
 | src/gallium/frontends/vdpau/output.c (diff) |
 | src/gallium/winsys/svga/drm/vmw_shader.c (diff) |
 | src/gallium/winsys/svga/drm/vmw_surface.c (diff) |
 | src/gallium/drivers/radeon/radeon_uvd_enc.c (diff) |
 | src/gallium/drivers/virgl/virgl_buffer.c (diff) |
 | src/gallium/winsys/sw/wrapper/wrapper_sw_winsys.c (diff) |
 | src/gallium/auxiliary/vl/vl_compositor.c (diff) |
 | src/gallium/frontends/dri/dri2.c (diff) |
 | src/gallium/frontends/osmesa/osmesa.c (diff) |
 | src/gallium/drivers/radeonsi/si_fence.c (diff) |
 | src/gallium/frontends/nine/surface9.c (diff) |
 | src/gallium/drivers/softpipe/sp_tile_cache.c (diff) |
 | src/gallium/drivers/swr/swr_context.cpp (diff) |
 | src/gallium/drivers/v3d/v3dx_draw.c (diff) |
 | src/gallium/drivers/radeonsi/gfx10_query.c (diff) |
 | src/gallium/auxiliary/vl/vl_zscan.c (diff) |
 | src/gallium/drivers/svga/svga_resource_texture.c (diff) |
 | src/gallium/auxiliary/util/u_draw.c (diff) |
 | src/gallium/drivers/r600/r600_shader.c (diff) |
 | src/gallium/drivers/virgl/virgl_resource.c (diff) |
 | src/gallium/drivers/zink/zink_resource.c (diff) |
 | src/gallium/auxiliary/driver_rbug/rbug_core.c (diff) |
 | src/gallium/drivers/svga/svga_resource_buffer.h (diff) |
 | src/gallium/tests/graw/fs-test.c (diff) |
 | src/gallium/drivers/panfrost/pan_resource.c (diff) |
 | src/gallium/frontends/vdpau/surface.c (diff) |
 | docs/gallium/screen.rst (diff) |
 | src/gallium/tests/graw/quad-sample.c (diff) |
 | src/gallium/auxiliary/util/u_index_modify.c (diff) |
 | src/gallium/drivers/radeonsi/si_perfcounter.c (diff) |
 | src/gallium/drivers/radeonsi/si_query.c (diff) |
 | src/gallium/frontends/va/buffer.c (diff) |
 | src/gallium/drivers/r600/r600_asm.c (diff) |
 | src/gallium/frontends/nine/nine_state.c (diff) |
 | src/gallium/auxiliary/util/u_transfer.c (diff) |
 | src/gallium/frontends/omx/bellagio/vid_enc.c (diff) |
 | src/mesa/state_tracker/st_texture.c (diff) |
 | docs/gallium/context.rst (diff) |
 | src/gallium/frontends/clover/core/resource.cpp (diff) |
 | src/gallium/auxiliary/util/u_threaded_context.h (diff) |
 | src/gallium/drivers/virgl/virgl_texture.c (diff) |
 | src/gallium/drivers/svga/svga_state_constants.c (diff) |
 | src/mesa/state_tracker/st_atom_pixeltransfer.c (diff) |
 | src/gallium/drivers/nouveau/nv30/nv30_transfer.c (diff) |
 | src/gallium/auxiliary/hud/font.c (diff) |
 | src/gallium/auxiliary/util/u_debug_image.c (diff) |
 | src/gallium/auxiliary/util/u_upload_mgr.c (diff) |
 | src/gallium/drivers/iris/iris_resource.c (diff) |
 | src/gallium/drivers/nouveau/nv30/nv30_miptree.c (diff) |
 | src/gallium/drivers/r300/r300_query.c (diff) |
 | src/gallium/frontends/va/image.c (diff) |
 | src/gallium/drivers/iris/iris_bufmgr.h (diff) |
 | src/gallium/drivers/svga/svga_swtnl_draw.c (diff) |
 | src/gallium/include/pipe/p_context.h (diff) |
 | src/gallium/drivers/llvmpipe/lp_texture.c (diff) |
 | src/gallium/drivers/nouveau/nv30/nv30_draw.c (diff) |
 | src/gallium/drivers/r600/radeon_vce.c (diff) |
 | src/gallium/auxiliary/util/u_debug_flush.c (diff) |
 | src/gallium/drivers/radeonsi/si_texture.c (diff) |
 | src/gallium/drivers/llvmpipe/lp_setup.c (diff) |
 | src/gallium/frontends/omx/vid_enc_common.c (diff) |
 | src/gallium/drivers/svga/svga_resource_buffer_upload.c (diff) |
 | src/gallium/include/pipe/p_defines.h (diff) |
 | src/gallium/frontends/nine/device9.c (diff) |
 | src/gallium/frontends/omx/vid_dec_common.c (diff) |
 | src/gallium/drivers/r300/r300_transfer.c (diff) |
 | src/gallium/frontends/nine/volume9.c (diff) |
 | src/gallium/drivers/r600/evergreen_compute.c (diff) |
 | src/gallium/frontends/vallium/val_execute.c (diff) |
 | src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c (diff) |
 | src/gallium/frontends/nine/buffer9.c (diff) |
 | src/gallium/auxiliary/driver_trace/tr_context.c (diff) |
 | src/gallium/drivers/r300/r300_render_translate.c (diff) |
 | src/gallium/drivers/r600/r600_state.c (diff) |
 | src/mesa/state_tracker/st_draw_feedback.c (diff) |
 | src/gallium/auxiliary/vl/vl_idct.c (diff) |
 | src/gallium/drivers/svga/svga_draw_arrays.c (diff) |
 | src/gallium/auxiliary/util/u_pstipple.c (diff) |
 | src/gallium/auxiliary/util/u_surface.c (diff) |
 | src/gallium/drivers/radeonsi/si_debug.c (diff) |
 | src/gallium/winsys/amdgpu/drm/amdgpu_bo.c (diff) |
 | src/gallium/frontends/dri/drisw.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_transfer.c (diff) |
 | src/gallium/auxiliary/util/u_prim_restart.c (diff) |
 | src/panfrost/shared/pan_minmax_cache.c (diff) |
 | src/mesa/state_tracker/st_cb_bufferobjects.c (diff) |
 | src/gallium/auxiliary/postprocess/pp_mlaa.c (diff) |
|
 | src/gallium/winsys/svga/drm/vmw_buffer.c (diff) |
 | src/mesa/state_tracker/st_cb_bufferobjects.c (diff) |
 | src/gallium/drivers/swr/swr_context.cpp (diff) |
 | src/gallium/frontends/dri/dri2.c (diff) |
 | src/gallium/winsys/amdgpu/drm/amdgpu_bo.c (diff) |
 | src/mesa/state_tracker/st_cb_texture.c (diff) |
 | src/mesa/state_tracker/st_cb_bufferobjects.h (diff) |
 | src/mesa/state_tracker/st_cb_drawpixels.c (diff) |
 | src/mesa/state_tracker/st_texture.c (diff) |
 | src/gallium/winsys/amdgpu/drm/amdgpu_bo.h (diff) |
 | src/gallium/include/pipe/p_state.h (diff) |
 | src/gallium/winsys/radeon/drm/radeon_drm_bo.c (diff) |
 | src/gbm/main/gbm.h (diff) |
 | src/gallium/drivers/iris/iris_resource.c (diff) |
 | src/gallium/frontends/xa/xa_context.c (diff) |
 | src/mesa/state_tracker/st_texture.h (diff) |
 | src/gallium/drivers/radeon/radeon_winsys.h (diff) |
 | src/gallium/include/pipe/p_defines.h (diff) |
 | src/mesa/state_tracker/st_cb_fbo.c (diff) |
|
 | src/gallium/auxiliary/util/u_threaded_context.h (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_transfer.c (diff) |
|
 | src/gallium/drivers/radeon/radeon_vce.c (diff) |
 | src/gallium/drivers/r600/r600_shader.c (diff) |
 | src/gallium/drivers/radeon/radeon_video.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/r600/radeon_vce.c (diff) |
 | src/gallium/drivers/radeon/radeon_vcn_enc.c (diff) |
 | src/gallium/winsys/amdgpu/drm/amdgpu_cs.c (diff) |
 | src/gallium/drivers/radeonsi/si_texture.c (diff) |
 | src/gallium/winsys/amdgpu/drm/amdgpu_bo.c (diff) |
 | src/gallium/drivers/r600/radeon_uvd.c (diff) |
 | src/gallium/drivers/radeon/radeon_uvd.c (diff) |
 | src/gallium/drivers/r600/radeon_video.c (diff) |
 | src/gallium/drivers/radeonsi/si_debug.c (diff) |
 | src/gallium/drivers/r600/r600_asm.c (diff) |
 | src/gallium/drivers/radeon/radeon_vcn_dec.c (diff) |
 | src/gallium/drivers/radeon/radeon_winsys.h (diff) |
 | src/gallium/drivers/r600/evergreen_compute.c (diff) |
 | src/gallium/drivers/radeon/radeon_uvd_enc.c (diff) |
Commit
66669eb5295c207622425d9767422a62e1228407
by eric+margenir/lower_io: Eliminate oob writes and return zero for oob reads
Out-of-bounds writes could be eliminated per spec:
Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:
"In the subsections described above for array, vector, matrix and structure accesses, any out-of-bounds access produced undefined behavior.... Out-of-bounds writes may be discarded or overwrite other variables of the active program. Out-of-bounds reads return undefined values, which include values from other variables of the active program or zero."
GL_KHR_robustness and GL_ARB_robustness encourage us to return zero for reads.
Otherwise get_io_offset would return out-of-bound offset which may result in out-of-bound loading/storing of inputs/outputs, that could cause issues in drivers down the line.
E.g. this fixes such dereference: int vue_slot = vue_map->varying_to_slot[intrin->const_index[0]]; in brw_nir.c
CC: <mesa-stable@lists.freedesktop.org> Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6428>
|
 | src/compiler/nir/nir_lower_io.c (diff) |
Commit
0ba82f78a57d352c1042678962e8a386b411322f
by eric+margenir/large_constants: Eliminate out-of-bounds writes to large constants
Out-of-bounds writes could be eliminated per spec:
Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:
"In the subsections described above for array, vector, matrix and structure accesses, any out-of-bounds access produced undefined behavior.... Out-of-bounds writes may be discarded or overwrite other variables of the active program."
Fixes: 1235850522cd5e7b07701f7065996430ca1514b6 Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6428>
|
 | src/compiler/nir/nir_opt_large_constants.c (diff) |
Commit
f2b17dec1208423061309e0e03ba32b2c5566ace
by eric+margenir/lower_samplers: Clamp out-of-bounds access to array of samplers
Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:
"In the subsections described above for array, vector, matrix and structure accesses, any out-of-bounds access produced undefined behavior.... Out-of-bounds reads return undefined values, which include values from other variables of the active program or zero."
Robustness extensions suggest to return zero on out-of-bounds accesses, however it's not applicable to the arrays of samplers, so just clamp the index.
Otherwise instr->sampler_index or instr->texture_index would be out of bounds, and they are used as an index to arrays of driver state.
E.g. this fixes such dereference: if (options->lower_tex_packing[tex->sampler_index] != in nir_lower_tex.c
CC: <mesa-stable@lists.freedesktop.org> Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6428>
|
 | src/compiler/nir/nir_lower_samplers.c (diff) |
Commit
4c1c546fa347cc9192434161d5777eb97b2dfdc3
by eric+margevulkan: bump headers/registry to 1.2.154
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6801>
|
 | include/vulkan/vulkan_beta.h (diff) |
 | include/vulkan/vk_icd.h (diff) |
 | include/vulkan/vulkan_ios.h (diff) |
 | include/vulkan/vulkan_macos.h (diff) |
 | src/vulkan/registry/vk.xml (diff) |
 | include/vulkan/vulkan_core.h (diff) |
 | include/vulkan/vk_layer.h (diff) |
Commit
10540c2f6ffaa3446676b66ef52c98f5b88149b1
by eric+margeanv: implement VK_KHR_copy_commands2
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6801>
|
 | src/intel/vulkan/anv_blorp.c (diff) |
 | src/intel/vulkan/anv_extensions.py (diff) |
Commit
d58a1a87ccac015ec5dfbff05a6a0600d63be8b3
by eric+margeaco: Use NIR IO semantics for tess factor IO locations.
Previously we relied on looping over the NIR output variables to remember the driver location of the tess factors, now use the new NIR IO semantics instead.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6689>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
 | src/amd/compiler/aco_instruction_selection_setup.cpp (diff) |
Commit
9bba79088da536031badd91ab8fbe02c88dcea5f
by eric+margeaco: use io semantics to get an intrinsic's slot
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6689>
|
 | src/amd/compiler/aco_instruction_selection.h (diff) |
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
 | src/amd/compiler/aco_instruction_selection_setup.cpp (diff) |
Commit
430cc90071e759362b1c7b7d2583d4c6edf60457
by eric+margeaco: use nir_get_io_offset_src() in visit_load_input()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6689>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
7f51a0c670577773f3cd67fd7efc307d7aba0e22
by eric+margeaco: use nir's constant source helpers more
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6689>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
fd872c3cf7729d7ef668d48f9b7f22ce964fbf2c
by eric+margeaco: remove dead indirect fs input loading
It's asserted that the visit_load_input code isn't reached. It also didn't handle divergent indexing and this situation should have been lowered anyway.
I think this used to be needed to pass a dEQP-VK.glsl.indexing.* test, but it doesn't seem needed anymore.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6689>
|
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
f100cf0d30e2345c740a0a37090bf35c89c96b3e
by eric+margeaco: stop multiplying driver_location by 4
This didn't really serve any purpose, doesn't match how FS inputs are currently done, and prevented us from using nir_io_add_const_offset_to_base in the future.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6689>
|
 | src/amd/compiler/aco_instruction_selection_setup.cpp (diff) |
 | src/compiler/nir/nir_linking_helpers.c (diff) |
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
9750164c0931a2af87bc42e39dcbdcf2ce820b21
by eric+margenir: Rename get_buffer_size to get_ssbo_size
This makes it explicit that this intrinsic is only for SSBOs. For the v3dv driver, we'll be adding a get_ubo_size intrinsic and we want to be able to distinguish between the two.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6812>
|
 | src/compiler/nir/nir_divergence_analysis.c (diff) |
 | src/intel/compiler/brw_fs_nir.cpp (diff) |
 | src/compiler/nir/nir_lower_io.c (diff) |
 | src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp (diff) |
 | src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c (diff) |
 | src/intel/compiler/brw_vec4_nir.cpp (diff) |
 | src/intel/vulkan/anv_nir_apply_pipeline_layout.c (diff) |
 | src/amd/compiler/aco_instruction_selection_setup.cpp (diff) |
 | src/compiler/glsl/glsl_to_nir.cpp (diff) |
 | src/broadcom/compiler/nir_to_vir.c (diff) |
 | src/freedreno/ir3/ir3_nir.c (diff) |
 | src/panfrost/midgard/midgard_compile.c (diff) |
 | src/panfrost/bifrost/bifrost_compile.c (diff) |
 | src/freedreno/ir3/ir3_shader.h (diff) |
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
 | src/gallium/auxiliary/gallivm/lp_bld_nir.h (diff) |
 | src/panfrost/util/pan_sysval.c (diff) |
 | src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp (diff) |
 | src/gallium/auxiliary/gallivm/lp_bld_nir.c (diff) |
 | src/freedreno/ir3/ir3_compiler_nir.c (diff) |
 | src/compiler/spirv/vtn_variables.c (diff) |
 | src/gallium/drivers/iris/iris_program.c (diff) |
 | src/compiler/nir/nir_intrinsics.py (diff) |
 | src/freedreno/vulkan/tu_shader.c (diff) |
 | src/amd/compiler/aco_instruction_selection.cpp (diff) |
Commit
952cf95f8b07526d2ea4d5bc84e5572535765534
by eric+margeetnaviv: fix comment for source of etna_mesa_debug
The file and the environment variables have different names than described in the comment. Fix the comment to avoid confusion.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6661>
|
 | src/gallium/drivers/etnaviv/etnaviv_debug.h (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.cpp (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_nir.cpp (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_nir.cpp (diff) |
Commit
a57f2d0cfab3517ca25c07dda7d4eea6e94e1381
by eric+marger600: Add flag for dual-source blending to shader key
Otherwise the number of outputs and the output data index can't be interpreted correctly.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>
|
 | src/gallium/drivers/r600/r600_shader.h (diff) |
 | src/gallium/drivers/r600/r600_state_common.c (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_nir.cpp (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_shader_fragment.h (diff) |
 | src/gallium/drivers/r600/sfn/sfn_shader_fragment.cpp (diff) |
Commit
44b45a38649e504ba46cd21a4a6ea2c6c15b4812
by eric+marger600/sfn: Handle number of color outputs taking dual source blending into account
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>
|
 | src/gallium/drivers/r600/sfn/sfn_shader_fragment.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_shader_fragment.h (diff) |
Commit
c2c5f71e962d4035cea89e72fb782cc759a27a95
by eric+marger600/sfn: Take dual source blending output indices into account
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>
|
 | src/gallium/drivers/r600/sfn/sfn_shader_fragment.cpp (diff) |
Commit
2abb9e5ac09c76dd56431e9623c71f7146e4ccb6
by eric+marger600/sfn: Acquire the number of FS outputs and the write_all info early
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>
|
 | src/gallium/drivers/r600/sfn/sfn_shader_fragment.cpp (diff) |
Commit
5d3a72cd61702633bb58e53bb98a93c0d087e25b
by eric+marger600/sfn: Be a bit more verbose when logging skipped FS outputs
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>
|
 | src/gallium/drivers/r600/sfn/sfn_shader_fragment.cpp (diff) |
Commit
205f4e9a577ab9eef5a22b7857e877c35bd75fec
by eric+margetu: Expose shaderStorageImageExtendedFormats
We already supported all the formats on the list, so it's trivial to enable.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6800>
|
 | src/freedreno/vulkan/tu_device.c (diff) |
Commit
6ebc20fd884153db7cb9390692190664d993b640
by eric+margetu: Expose shaderImageGatherExtended
This just allows textureGather() to have offsets, which we already supported in ir3.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6800>
|
 | src/freedreno/vulkan/tu_device.c (diff) |
Commit
37054a3ef5d2d177eac90e24852742a04afd3dd4
by eric+margeir3: Don't use the format to get the image type
Use the sampler type instead, which was recently plumbed through core NIR, for load/store and the right type for atomics. This removes the last hard dependency on the image format.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6800>
|
 | src/freedreno/ir3/ir3_image.c (diff) |
Commit
e781cc702557f1102fc6253f5654696490742e06
by eric+margetu: Expose shaderStorageImage*WithoutFormat
We don't use the format anymore in the backend, except determining the number of components, and we fallback to 4 there if it's not specified. So we should be safe to enable this.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6800>
|
 | src/freedreno/vulkan/tu_device.c (diff) |
Commit
a1f46d7b6943699e5efb60fbcfdd1450db85adb1
by eric+margeci: Use ignore_scheduled_pipelines anchor in .radeonsi-rules
Without this, scheduled pipelines erroneously tried to create jobs using this template, which can't work, because their dependency jobs don't exist in scheduled pipelines. Unfortunately, this resulted in scheduled pipelines not running silently, without any direct feedback about what's wrong (see https://gitlab.com/gitlab-org/gitlab/-/issues/25490).
Fixes: 6c8b921572a5 "ci: Build kernels and rootfs for x86 devices" Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6802>
|
 | .gitlab-ci/test-source-dep.yml (diff) |
Commit
cd12fcff96cc7db794047e2a045142ea861254a2
by eric+margeradeonsi: set TRUNC_COORD=0 for Total War: WARHAMMER to fix it
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3233
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6810>
|
 | src/util/00-mesa-defaults.conf (diff) |
 | src/gallium/drivers/radeonsi/si_debug_options.h (diff) |
 | src/gallium/drivers/radeonsi/si_state.c (diff) |
Commit
98188409d115d08f3b4e99cdb942118acdf71513
by eric+margeradeonsi: move debug options from si_disk_cache_create to si_get_ir_cache_key
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6810>
|
 | src/gallium/drivers/radeonsi/si_pipe.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
Commit
40a50e939851c7b1a3c7d3fe92bf7706a1f28025
by eric+margeradeonsi: remove KILL_PS_INF_INTERP/CLAMP_DIV_BY_ZERO, use screen::options
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6810>
|
 | src/gallium/drivers/radeonsi/si_pipe.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.h (diff) |
Commit
d7495bd123a6215f85a5b9a01e2c3ab5bc203c53
by eric+margeamd: add Dimgrey Cavefish support
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6820>
|
 | src/amd/addrlib/src/amdgpu_asic_addr.h (diff) |
 | src/amd/common/ac_gpu_info.c (diff) |
 | src/amd/addrlib/src/gfx10/gfx10addrlib.cpp (diff) |
 | src/gallium/drivers/radeon/radeon_vcn_dec.c (diff) |
 | src/amd/common/amd_family.h (diff) |
 | src/amd/llvm/ac_llvm_util.c (diff) |
Commit
283686ad6762182037b708f1b5187129aff0a5dd
by eric+margeamd: add VanGogh support
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6820>
|
 | src/amd/common/ac_gpu_info.c (diff) |
 | src/amd/addrlib/src/gfx10/gfx10addrlib.cpp (diff) |
 | src/amd/addrlib/src/amdgpu_asic_addr.h (diff) |
 | src/amd/common/amd_family.h (diff) |
 | src/amd/llvm/ac_llvm_util.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.c (diff) |
 | src/gallium/drivers/radeon/radeon_vcn_dec.c (diff) |
 | src/amd/addrlib/src/core/addrlib.cpp (diff) |
Commit
25b36d900acb0d3d923bd0b99a6d8443b4616c73
by eric+margemesa: Make the android_stub be a set of non-installed shared libraries.
Previously, we included the stubs in our driver binaries, so they didn't call the actual system libraries for these functions. This was enough to build-test the Android code in CI without even the NDK.
To make NDK-built Mesa drivers useful, we need to link against these system libraries that aren't present in the NDK. Split the symbols to separate non-installed shared libraries and link against those, so that when you drop the resulting .so in your /vendor/lib64/hw/, it just works out.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6805>
|
 | src/android_stub/log_stub.cpp |
 | src/android_stub/meson.build (diff) |
 | src/android_stub/android_stub.cpp |
 | src/android_stub/backtrace_stub.cpp |
 | src/android_stub/cutils_stub.cpp |
 | src/android_stub/hardware_stub.cpp |
 | src/android_stub/sync_stub.cpp |
 | src/android_stub/README.md |
Commit
ee4cee6dbdfcafb0ec88fe010d4ae05ce06e2e52
by eric+margeandroid: Disable trying to read/write to the disk cache.
We need the disk cache enabled in Android to get EGL_ANDROID_blob_cache's callbacks called, but we don't actually want to store anything on disk. Fixes "Failed to create //.cache for shader cache (Read-only file system)---disabling." spam on init.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6762>
|
 | src/util/disk_cache.c (diff) |
 | src/compiler/glsl/tests/cache_test.c (diff) |
Commit
924e27647e47d51111bca12bce470aba4fd85e37
by eric+margenir_lower_system_values: Fix load_global_invocation_id to use base_work_group_id even with no base_global id
Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6668>
|
 | src/compiler/nir/nir_lower_system_values.c (diff) |
Commit
2970d388a2a956b6c2571dccc2612d71aa666612
by eric+margegallium/util: add shader for stencil-blits
This shader is useful to replicate single bit from a stencil buffer even when there's no support for PIPE_CAP_SHADER_STENCIL_EXPORT.
This is useful for the D3D12 driver, where the graphics pipeline is the only way of writing to MSAA stencil-buffers, and not all drivers support exporting the stencil-value from the shader.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6681>
|
 | src/gallium/auxiliary/util/u_simple_shaders.h (diff) |
 | src/gallium/auxiliary/util/u_simple_shaders.c (diff) |
Commit
e8a40715a8bcd479c0c33eab411d276777153a0e
by eric+margegallium/util: add blitter-support for stencil-fallback
This wires up the shader in the previous commit so we can blit without having to reimplement the blitter in the D3D12 driver.
This isn't optimal, but it's reasonable enough, and this behavior is rare.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6681>
|
 | src/gallium/auxiliary/util/u_blitter.c (diff) |
 | src/gallium/auxiliary/util/u_blitter.h (diff) |
Commit
43c7de6b910d965962d83877eb9560a027c1350c
by eric+margeradv: remove useless assignment of MAX_API_VERSION
It's overwritten few lines below.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6818>
|
 | src/amd/vulkan/radv_extensions.py (diff) |
Commit
93f158fa2ea6f05cd96304a48b8eeb7c6ba1173b
by eric+margeradv: bump the advertised patch version to 145
We have been keeping up with the spec updates. Same as ANV.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6818>
|
 | src/amd/vulkan/radv_extensions.py (diff) |
Commit
cc709a07f27c6d0ac2b8a8c98a15fb00014a8efc
by eric+margeradv: add VK_KHR_copy_commands2 but leave it disabled
To declare new prototypes.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
|
 | src/amd/vulkan/radv_extensions.py (diff) |
Commit
eccc73ff780da0380067690f81ca9db93d67b66c
by eric+margeradv: add support for CmdBlitImage2KHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
|
 | src/amd/vulkan/radv_meta_blit.c (diff) |
Commit
22a08da7370e581d71a8c19dee028be4c7c07a86
by eric+margeradv: add support for CmdCopyBuffer2KHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
|
 | src/amd/vulkan/radv_meta_buffer.c (diff) |
Commit
69dfcfbb24af13a32a58aadaa231d10238d8f1cc
by eric+margeradv: add support for CmdCopyBufferToImage2KHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
|
 | src/amd/vulkan/radv_meta_copy.c (diff) |
Commit
f9915ac465b2926df8f12a7221062e42e57cc494
by eric+margeradv: add support for CmdCopyImage2KHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
|
 | src/amd/vulkan/radv_meta_copy.c (diff) |
Commit
fe819710adcc337ff87bb8eca259f0235ba9a1ed
by eric+margeradv: add support for CmdCopyImageToBuffer2KHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
|
 | src/amd/vulkan/radv_meta_copy.c (diff) |
Commit
9a700af65cf8d34b44dae1fbf2cef9d5a8f7d7d1
by eric+margeradv: cleanup selecting the hardware resolve path
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
|
 | src/amd/vulkan/radv_meta_resolve.c (diff) |
Commit
0401507b77db041cf1364dfd37973bf3bd2597e0
by eric+margeradv: add support for CmdResolveImage2KHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
|
 | src/amd/vulkan/radv_meta.h (diff) |
 | src/amd/vulkan/radv_meta_resolve_cs.c (diff) |
 | src/amd/vulkan/radv_meta_resolve_fs.c (diff) |
 | src/amd/vulkan/radv_meta_resolve.c (diff) |
Commit
c669db0b503c10faf2d1c67c9340d7222b4f946e
by eric+margeradv: advertise VK_KHR_copy_commands2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
|
 | src/amd/vulkan/radv_extensions.py (diff) |
 | docs/relnotes/new_features.txt (diff) |
Commit
12128fb1351eee6ec681039fe8483b3c39db7c8e
by eric+margelima: add natively supported vertex buffer formats
Add natively supported vertex buffer formats. If formats are not listed here as natively supported, mesa triggers a buffer format translation routine per draw call which can be expensive. This helps improve performance in some applications. The 32-bit integer formats were found by trial and error with a script and checked in particular with piglit test gl-2.0-vertexattribpointer.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com> Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6714>
|
 | src/gallium/drivers/lima/lima_draw.c (diff) |
 | src/gallium/drivers/lima/lima_screen.c (diff) |
|
 | src/amd/vulkan/radv_device.c (diff) |
Commit
43735c06df439ec5c1254c153a21813c5b230094
by eric+margeradv: Simplify radv_is_hw_resolve_pipeline.
We have the bounds so all the format checking is not needed.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6831>
|
 | src/amd/vulkan/radv_meta.h (diff) |
Commit
e893102bcf5d6632f36399d745481639344e5526
by eric+margeradv: Add VK_FORMAT_E5B9G9R9_UFLOAT_PACK32 rendering support.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6831>
|
 | src/amd/vulkan/radv_private.h (diff) |
 | src/amd/vulkan/radv_cmd_buffer.c (diff) |
 | src/amd/vulkan/radv_formats.c (diff) |
 | src/amd/vulkan/radv_image.c (diff) |
Commit
87f91e20143eae314c2a93b7f676413a08cd5c11
by pendingchaos02st/nir: call nir_opt_access before gl_nir_lower_buffers
This pass should be run with deref-based SSBO access.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6778>
|
 | src/mesa/state_tracker/st_program.c (diff) |
 | src/mesa/state_tracker/st_glsl_to_nir.cpp (diff) |
Commit
68bb91ee11125c563ddaaa7580f351a27f85e1d4
by pendingchaos02radeonsi: don't use nir_opt_access
st/mesa already calls this and nir_opt_access should be run with deref-based SSBO access.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6778>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
6865a6a74cf4b55e289786dfe303c35dacffed3b
by eric+margeradv: set KEEP_TOGETHER_ENABLE if necessary on GFX10+
Ported from RadeonSI and PAL.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6838>
|
 | src/amd/vulkan/radv_pipeline.c (diff) |
Commit
24a74b352c8f2c06e47ce32192df5cbe125e77d7
by eric+margeradv: add a tweak for PS wave CU utilization for gfx10.3
Ported from RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6838>
|
 | src/amd/vulkan/si_cmd_buffer.c (diff) |
|
 | src/panfrost/bifrost/disassemble.c (diff) |
Commit
5ff3feab88a1e8b187267bdfbbae86d45a87b489
by eric+margepan/bi: Annotate disassemble with format names
It's hard enough to keep this all straight as it is.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
|
 | src/panfrost/bifrost/disassemble.c (diff) |
Commit
43c6623c9eb106ef54191b7f404db669f8c9aec4
by eric+margepan/bi: Inline dump_instr
Tuple dumping is trivial now that we autogenerate most of it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
|
 | src/panfrost/bifrost/disassemble.c (diff) |
Commit
9de34e16e0e0d6af8bdcb906961320b46d08ff1b
by eric+margepan/bi: Track M values of disassembled constants
We'll want to route these values from the clause itself to the source dump in order to disassemble modified embedded constants.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
|
 | src/panfrost/bifrost/disassemble.c (diff) |
 | src/panfrost/bifrost/disassemble.h (diff) |
 | src/panfrost/bifrost/gen_disasm.py (diff) |
Commit
08a9e5e3e892e9acc7fcfc2cefb45990efa62e40
by eric+margepan/bi: Decode M values in disasm
This is rather complicated and mostly unused in real world code but correct handling is required to disassemble branchy code.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
|
 | src/panfrost/bifrost/disassemble.c (diff) |
Commit
b392c07983441456c824688ba30b3c8e77995604
by eric+margepan/bi: Disassemble PC-relative addresses
Apply whatever modifier we computed and symbolically work out the behaviour of the hardware. This involves some pretty gnarly primitives (e.g. 28-bit sign extensions) but seems to works ok.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
|
 | src/panfrost/bifrost/disassemble.c (diff) |
Commit
4d3d5a66c92d26b092800544b2a1f168c84b195a
by eric+margepan/bi: Add bifrost_reg_mode enum
This generalizes the previous control field, adding in the full set of enums required for 16-bit writemasks.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
|
 | src/panfrost/bifrost/bifrost.h (diff) |
Commit
bdb33f75297a04caf52774869b2206bcb4f01a68
by eric+margepan/bi: Pass 'first' through disassembler
Required to decode the registers of the first instruction of a clause correctly.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
|
 | src/panfrost/bifrost/gen_disasm.py (diff) |
 | src/panfrost/bifrost/disassemble.c (diff) |
 | src/panfrost/bifrost/disassemble.h (diff) |
Commit
c749803dbbed4f7bfed9e0d6298956a10e0b984a
by eric+margepan/bi: Decode all 32-bit register modes
There's actually more than 16 of them, disambiguated by `r2 == r3` and `first?` as conditions for another "fun" encoding. The extra space allows for writing half-registers.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
|
 | src/panfrost/bifrost/bi_pack.c (diff) |
 | src/panfrost/bifrost/bifrost.h (diff) |
 | src/panfrost/bifrost/disassemble.c (diff) |
Commit
514da97ccacc766eccb9a3e32ef08b6c318c9a39
by eric+margepan/bi: Rename port -> slot
To match the canonical naming convention.
$ sed -i -e 's/\([_ \.>"!]\)[pP]ort\([ ,'"'"'_0123s\(\[]\)/\1slot\2/g' *.c *.h
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
|
 | src/panfrost/bifrost/bi_pack.c (diff) |
 | src/panfrost/bifrost/bi_print.h (diff) |
 | src/panfrost/bifrost/bi_schedule.c (diff) |
 | src/panfrost/bifrost/bi_pack_helpers.h (diff) |
 | src/panfrost/bifrost/compiler.h (diff) |
 | src/panfrost/bifrost/bifrost.h (diff) |
 | src/panfrost/bifrost/bi_print.c (diff) |
Commit
7a0f3b607ed5891eb980ea4fd90afd8b5c7b5032
by eric+margepan/bi: Use canonical register packing
This better matches the hardware behaviour and will allow us to implement write masks down the line.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
|
 | src/panfrost/bifrost/bi_pack_helpers.h (diff) |
 | src/panfrost/bifrost/bifrost.h (diff) |
 | src/panfrost/bifrost/compiler.h (diff) |
 | src/panfrost/bifrost/bi_print.c (diff) |
 | src/panfrost/bifrost/bi_pack.c (diff) |
Commit
28a76161e5d4ef79381206b734e8ce415675a3ca
by eric+margepan/bi: Remove old register mode definitions
Now replaced by canonical equivalents.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
|
 | src/panfrost/bifrost/bifrost.h (diff) |
Commit
8b134fb915d8ca5ae1aefacc25d91de88862d46d
by eric+margeradeonsi: set KEEP_TOGETHER_ENABLE if needed
ported from PAL
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6822>
|
 | src/gallium/drivers/radeonsi/si_state.c (diff) |
Commit
972fb0368cbe85d52a0f65973b76607b02a32d69
by eric+margeradeonsi: move binning parameters into si_screen
it will be used in the next commit
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6822>
|
 | src/gallium/drivers/radeonsi/si_pipe.h (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_binning.c (diff) |
Commit
b5debe180efd3a8b2cd02a3c452a8917473a312b
by eric+margeradeonsi: break a binning batch on a new PS if bins can use multiple state sets
ported from PAL
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6822>
|
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
Commit
5f27777379f5939871d4a5fdedc64b27a592d82a
by eric+margeradeonsi: add a tweak for PS wave CU utilization for gfx10.3
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6822>
|
 | src/gallium/drivers/radeonsi/si_state.c (diff) |
Commit
c58b46edf0e96f927c3d7401229479046e57dc7d
by eric+margeradeonsi: force linear for textures with height=1 (gfx6-8)
addrlib will force it only for level = 0, so force it when we create a height=1/multi-level texture.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2250 Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6775>
|
 | src/gallium/drivers/radeonsi/si_texture.c (diff) |
Commit
21174dedec43df155309653764d76b4acd4d5f86
by eric+margenir: split fuse_ffma into fuse_ffma16/32/64
AMD wants different behavior for each bit size
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6756>
|
 | src/gallium/drivers/r600/r600_pipe_common.c (diff) |
 | src/gallium/drivers/radeonsi/si_get.c (diff) |
 | src/compiler/nir/nir.h (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_screen.c (diff) |
 | src/panfrost/bifrost/bifrost_compile.h (diff) |
 | src/compiler/nir/nir_opt_algebraic.py (diff) |
 | src/freedreno/ir3/ir3_nir.c (diff) |
 | src/gallium/drivers/nouveau/nv50/nv50_screen.c (diff) |
 | src/gallium/drivers/freedreno/a2xx/ir2_nir.c (diff) |
 | src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp (diff) |
Commit
771aad30276397d6388c147b93c9e298fe30b72b
by eric+margenir: split lower_ffma into lower_ffma16/32/64
AMD wants different behavior for each bit size
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6756>
|
 | src/gallium/drivers/zink/zink_compiler.c (diff) |
 | src/panfrost/midgard/midgard_compile.h (diff) |
 | src/intel/compiler/brw_compiler.c (diff) |
 | src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp (diff) |
 | src/broadcom/compiler/nir_to_vir.c (diff) |
 | src/compiler/nir/nir_lower_flrp.c (diff) |
 | src/gallium/drivers/lima/lima_program.c (diff) |
 | src/gallium/drivers/radeonsi/si_get.c (diff) |
 | src/compiler/nir/nir.h (diff) |
 | src/compiler/nir/nir_opt_algebraic.py (diff) |
 | src/gallium/drivers/llvmpipe/lp_screen.c (diff) |
 | src/gallium/drivers/vc4/vc4_program.c (diff) |
 | src/amd/vulkan/radv_shader.c (diff) |
Commit
f1284505f0fae78dee2af06e2d8a194d1bc5b442
by eric+margeradeonsi: fuse or lower ffma optimally on all chips
LLVM is going to support the legacy instructions soon.
This change switches FMA to MAD for gfx10.
54793 shaders in 33659 tests Totals: SGPRS: 2632554 -> 2629570 (-0.11 %) VGPRS: 1536364 -> 1535312 (-0.07 %) Spilled SGPRs: 3602 -> 3562 (-1.11 %) Spilled VGPRs: 44 -> 40 (-9.09 %) Private memory VGPRs: 256 -> 256 (0.00 %) Scratch size: 312 -> 308 (-1.28 %) dwords per thread Code Size: 55422660 -> 55345408 (-0.14 %) bytes Max Waves: 963983 -> 964200 (0.02 %)
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6756>
|
 | src/gallium/drivers/radeonsi/si_get.c (diff) |
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
Commit
939ddf3f67de2ed1700c093e60cf95c1b72ff20b
by eric+margenir: replace lower_ffma and fuse_ffma with has_ffma
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6756>
|
 | src/gallium/drivers/r600/r600_pipe_common.c (diff) |
 | src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp (diff) |
 | src/gallium/drivers/freedreno/a2xx/ir2_nir.c (diff) |
 | src/compiler/nir/nir_opt_algebraic.py (diff) |
 | src/gallium/drivers/radeonsi/si_get.c (diff) |
 | src/gallium/drivers/nouveau/nv50/nv50_screen.c (diff) |
 | src/compiler/nir/nir.h (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_screen.c (diff) |
 | src/gallium/drivers/lima/lima_program.c (diff) |
 | src/panfrost/midgard/midgard_compile.h (diff) |
 | src/gallium/drivers/zink/zink_compiler.c (diff) |
 | src/gallium/drivers/llvmpipe/lp_screen.c (diff) |
 | src/compiler/nir/nir_lower_flrp.c (diff) |
 | src/intel/compiler/brw_compiler.c (diff) |
 | src/freedreno/ir3/ir3_nir.c (diff) |
 | src/panfrost/bifrost/bifrost_compile.h (diff) |
 | src/amd/vulkan/radv_shader.c (diff) |
 | src/broadcom/compiler/nir_to_vir.c (diff) |
 | src/gallium/drivers/vc4/vc4_program.c (diff) |
Commit
2aa48bb5a8dbf3cc6584011ee2b869c586402d34
by eric+margepanfrost: Clamp uniform buffer size
Issue (57) for the ARB_uniform_buffer_object spec states: "The uniform buffer could be larger than the amount of uniform block(s) data inside it."
This means we need to clamp the uniform buffer size in case it is bigger than what hardware supports.
Fixes the OpenGL 3.3 renderer of GZDoom.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6835>
|
 | src/gallium/drivers/panfrost/pan_cmdstream.c (diff) |
Commit
3d0ae7a9dab839823a47da228c40935667e05ca0
by eric+margepanfrost: Handle non-positive viewport positions
It's possible for viewport positions to be negative, so add a lower bound of zero and avoid wraparound when maximum values are zero.
Fixes the menu blur effect in the OpenGL 3.3 render of GZDoom.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6840>
|
 | src/gallium/drivers/panfrost/pan_cmdstream.c (diff) |
Commit
e560028c8e76727b6459cc9e7769200792dc68a7
by eric+margepanfrost: Remove redundant casts of viewport position
The position is already converted to int when clamping to framebuffer size.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6840>
|
 | src/gallium/drivers/panfrost/pan_cmdstream.c (diff) |
Commit
0051f2cb2a6092a9907cc6a491a19ce63fc5f0b9
by eric+margeradeonsi: use optimal order of operations when setting up a compute dispatch
The order is: - set registers - flush caches - set render condition - prefetch the shader - set registers that may be read from memory (indirect draw) - dispatch
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
|
 | src/gallium/drivers/radeonsi/si_compute.c (diff) |
Commit
816a867bbd071d8b119023d6769164cdca218faf
by eric+margeradeonsi: call si_upload_graphics_shader_descriptors before the big conditional
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
|
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
Commit
d647065b069d232ba41aa1512b5aa259feadd596
by eric+margeradeonsi: move a displaced comment in si_draw_vbo
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
|
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
Commit
532259b8a3b8a92c79a1c6ea8d367394d1b39052
by eric+margeradeonsi: don't call emit_cache_flush after uploading bindless descriptors
The next draw call will do it.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
|
 | src/gallium/drivers/radeonsi/si_descriptors.c (diff) |
Commit
12b1e8a35d2cbbb614136d0b2b7b72c8075c5cdc
by eric+margeradeonsi: reorganize the code around the gfx9 scissor bug
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
|
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
Commit
8ab15c9e33a71923bb1b2c338544393b0e7bcffb
by eric+margeradeonsi: move si_upload_vertex_buffer_descriptors into si_state_draw.c
It will be inlined there.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
|
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
 | src/gallium/drivers/radeonsi/si_state.h (diff) |
 | src/gallium/drivers/radeonsi/si_descriptors.c (diff) |
Commit
0b2f75f9ac2ac0f7cd7755cdd0799385c86166c6
by eric+margeradeonsi: add unlikely statements into si_draw_vbo
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
|
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
Commit
f24b5894f8c6aef66adbed944ef0bfa3001a40f8
by eric+margeradeonsi: lift the conditional for skipping si_upload_vertex_buffer_descriptors
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
|
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
Commit
32d754825c45a17b60aefb45d0e0606ab1f2b6e7
by eric+margeradeonsi: always inline draw-related functions that have only one use
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
|
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
Commit
4c71cda9abc78312442d451b58b0163ae09adb88
by eric+margevulkan/wsi/display: add option for display fence to signal syncobj
To avoid having a separate "wsi_fence" path in the driver, make it so wsi fences can signal a syncobj.
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Acked-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6707>
|
 | src/intel/vulkan/anv_wsi_display.c (diff) |
 | src/vulkan/wsi/wsi_common_display.h (diff) |
 | src/vulkan/wsi/wsi_common_display.c (diff) |
 | src/amd/vulkan/radv_wsi_display.c (diff) |
 | src/freedreno/vulkan/tu_wsi_display.c (diff) |
Commit
005d9d22190b3cc80480b98f78b7a6d7c7b979ae
by eric+margeci: adjust RadeonSI rules
src/amd/vulkan is specific to RADV and shouldn't trigger RadeonSI CI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Michel Dänzer <mdaenzer@redhat.com> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6839>
|
 | .gitlab-ci/test-source-dep.yml (diff) |
Commit
9e13a16c974b239eedc121c647f1d54a1fe4d9e4
by eric+margemesa: handle GL_FRONT after translating to it
Without this, we end up throwing errors on code along these lines when rendering using single-buffering:
GLint att; glGetIntegerv(GL_READ_BUFFER, &att); glGetFramebufferAttachmentParameteriv(GL_READ_FRAMEBUFFER, att, ...);
This is because we internally translate GL_BACK (which is what glGetIntegerv returned) to GL_FRONT, which we don't handle in the Desktop GL case. So let's start handling it.
This fixes the GLTF-GL33.gtf21.GL2FixedTests.buffer_color.blend_color test for me.
Fixes: e6ca6e587e7 ("mesa: Handle pbuffers in desktop GL framebuffer attachment queries")
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6815>
|
 | src/mesa/main/fbobject.c (diff) |
|
 | src/freedreno/vulkan/tu_fence.c (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
Commit
89ffe859a8fddaa12c25099da30aa7008d8969e6
by eric+margeturnip: add a fd field to tu_device
Avoid the extra indirect for this commonly used field.
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6683>
|
 | src/freedreno/vulkan/tu_private.h (diff) |
 | src/freedreno/vulkan/tu_drm.c (diff) |
 | src/freedreno/vulkan/tu_device.c (diff) |
Commit
c23206757a1821738f112b59a698d95f8526b8e9
by eric+margeturnip: require syncobj support
Note: this means turnip requires kernel 5.8 (or older with syncobj patch).
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6683>
|
 | src/freedreno/vulkan/tu_drm.c (diff) |
Commit
cec0bc73e550859635a71d330625bccdf71e87ee
by eric+margeturnip: rework fences to use syncobjs
Fences are now just a syncobj, which makes our life easier.
The next step will be to fill out ImportFenceFdKHR()/GetFenceFdKHR().
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6683>
|
 | src/freedreno/vulkan/tu_device.c (diff) |
 | src/freedreno/vulkan/meson.build (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
 | src/freedreno/vulkan/tu_drm.c (diff) |
 | src/freedreno/vulkan/tu_kgsl.c (diff) |
 | src/freedreno/vulkan/tu_wsi_display.c (diff) |
 | src/freedreno/vulkan/tu_fence.c |
Commit
5bc24fe2833b1d7d5d482787c452b92b214d9abe
by eric+margeradeonsi/tmz: use secure job if framebuffer has dcc
Fixes a hang with DCC.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
|
 | src/gallium/drivers/radeonsi/si_descriptors.c (diff) |
|
 | src/gallium/drivers/radeonsi/si_descriptors.c (diff) |
Commit
0a59d2a3e9ed9965b303abd469065486ced5da77
by eric+margeradeonsi/tmz: add safety assert when tmz is enabled
This commit adds asserts verifying the following conditions when using a secure job: - fb textures are encrypted (both colors and depth/stencil buffers) - all writeable bo are encrypted
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
|
 | src/gallium/drivers/radeonsi/si_descriptors.c (diff) |
|
 | src/gallium/drivers/radeonsi/si_buffer.c (diff) |
Commit
5e4aecec93204c832dc7756286f79fd8f1e4f8d2
by eric+margeradeonsi: introduce SI_RESOURCE_FLAG_INTERNAL / RADEON_FLAG_DRIVER_INTERNAL
Tag allocations as driver internal. Some of these allocations will need to be doubled to handle TMZ (one secure bo, one normal bo) but these allocations shouldn't switch the winsys in "the app is using TMZ".
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
|
 | src/gallium/drivers/radeonsi/si_compute_prim_discard.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.h (diff) |
 | src/gallium/drivers/radeonsi/si_texture.c (diff) |
 | src/gallium/drivers/radeonsi/si_compute.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
 | src/gallium/drivers/radeonsi/si_buffer.c (diff) |
 | src/gallium/drivers/radeonsi/si_gfx_cs.c (diff) |
 | src/gallium/drivers/radeonsi/si_cp_reg_shadowing.c (diff) |
 | src/gallium/drivers/radeonsi/si_blit.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_cp_dma.c (diff) |
 | src/gallium/drivers/radeon/radeon_winsys.h (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.c (diff) |
|
 | include/drm-uapi/amdgpu_drm.h (diff) |
|
 | src/amd/common/ac_gpu_info.c (diff) |
 | src/amd/common/ac_gpu_info.h (diff) |
Commit
1b0d660cbc7a0b4e856295eeb5350dfa9b45f405
by eric+margeradeonsi/tmz: allow secure job if the app made a tmz allocation
This commit makes TMZ always allowed instead of being either off or forced-on with AMD_DEBUG=tmz.
With this change: - secure job can be used as soon as the application made a tmz allocation. Driver internal allocations are not enough to enable secure jobs (if tmz is supported and enabled by the kernel) - AMD_DEBUG=tmz forces all scanout/depth/stencil buffers to be allocated as TMZ. This is useful to test app thats don't explicitely support protected content.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
|
 | src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h (diff) |
 | src/gallium/drivers/radeonsi/si_buffer.c (diff) |
 | src/gallium/drivers/radeonsi/si_compute.c (diff) |
 | src/gallium/winsys/amdgpu/drm/amdgpu_bo.c (diff) |
 | src/gallium/winsys/radeon/drm/radeon_drm_winsys.c (diff) |
 | src/gallium/drivers/radeonsi/si_dma_cs.c (diff) |
 | src/gallium/drivers/radeonsi/si_cp_dma.c (diff) |
 | src/gallium/winsys/amdgpu/drm/amdgpu_cs.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.h (diff) |
 | src/gallium/drivers/radeon/radeon_winsys.h (diff) |
 | src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c (diff) |
Commit
55b018b634be8409a8a3f421082827509d23ac03
by eric+margeamd/winsys: add RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION
Instead of exposing a cs_set_secure() callback that always needs a call to si_flush_gfx_cs before a switch, this commit introduces a new flag to switch between secure and non-secure on submissions.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
|
 | src/gallium/drivers/radeonsi/si_compute.c (diff) |
 | src/gallium/drivers/radeonsi/si_cp_dma.c (diff) |
 | src/gallium/drivers/radeon/radeon_winsys.h (diff) |
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
 | src/gallium/winsys/amdgpu/drm/amdgpu_cs.h (diff) |
 | src/gallium/winsys/amdgpu/drm/amdgpu_cs.c (diff) |
 | src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c (diff) |
 | src/gallium/drivers/radeonsi/si_dma_cs.c (diff) |
 | src/gallium/winsys/radeon/drm/radeon_drm_winsys.c (diff) |
 | src/gallium/drivers/radeonsi/si_gfx_cs.c (diff) |
|
 | src/gallium/drivers/radeonsi/si_texture.c (diff) |
|
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.h (diff) |
Commit
8e2768bbfb1b0e9d70bb5a4d0267c6eb387d1c30
by eric+margeradeonsi/tmz: add tmz variant for sctx::tess_rings
tess_rings must be encrypted when used in a secure job so this commit introduces a tess_rings_tmz resource.
The cs_preamble_state doesn't contain the tess_rings address anymore since it can change. The tess_rings related registers go in a separate preamble.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
|
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
 | src/gallium/drivers/radeonsi/si_gfx_cs.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.h (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
|
 | src/gallium/drivers/radeonsi/si_gfx_cs.c (diff) |
|
 | src/gallium/drivers/radeonsi/si_pipe.h (diff) |
 | src/gallium/drivers/radeonsi/si_fence.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.c (diff) |
Commit
24796899685c0be3cd99fef02a7ec3ebb7b1b63b
by eric+margeradeonsi/tmz: add workaround for mpv/vaapi subtitles
Subtitles are rendering with an upload through a staging texture. So the sequence is: 1. draw video (with a secure cs) 2. copy staging texture to the real texture (via si_resource_copy_region) in a non-secure cs. 3. draw video (with a secure cs)
Step 2 and 3 both generates a flush with RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION. These flushes are executed quite late: right before doing the draw/dispatch, so maybe the issue here is the handling of dependencies.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
|
 | src/gallium/drivers/radeonsi/si_gfx_cs.c (diff) |
Commit
90b98c06493f8a9759e5496d5ec91fb60edf7b92
by eric+margeamd/tmz: move uses_secure_bos to radeon_winsys
This allows to inline radeon_uses_secure_bos calls and reduce CPU overhead.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
|
 | src/gallium/winsys/amdgpu/drm/amdgpu_cs.c (diff) |
 | src/gallium/drivers/radeonsi/si_compute.c (diff) |
 | src/gallium/drivers/radeon/radeon_winsys.h (diff) |
 | src/gallium/drivers/radeonsi/si_gfx_cs.c (diff) |
 | src/gallium/winsys/amdgpu/drm/amdgpu_bo.c (diff) |
 | src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c (diff) |
 | src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h (diff) |
 | src/gallium/winsys/radeon/drm/radeon_drm_winsys.c (diff) |
 | src/gallium/drivers/radeonsi/si_dma_cs.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
 | src/gallium/drivers/radeonsi/si_cp_dma.c (diff) |
Commit
1aa1b9f86ce89519ea0150a61cfc53c5e5ddb7ea
by jonathanradv: fix incorrect ResetFences path for WSI fence
Looks like this path is meant for RADV_FENCE_WINSYS type fences.
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6846>
|
 | src/amd/vulkan/radv_device.c (diff) |
Commit
d8cdcd4adf7a1209da7afe47056118183e2b3529
by jonathanradv: use syncobj for wsi fence
Note: this also fixes vk_object_base_init() not being called for the wsi fences, now that it goes through radv_CreateFence().
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6846>
|
 | src/amd/vulkan/radv_extensions.py (diff) |
 | src/amd/vulkan/radv_private.h (diff) |
 | src/amd/vulkan/radv_wsi_display.c (diff) |
 | src/amd/vulkan/radv_device.c (diff) |
Commit
140f53e64646668c09dd4f09d2df9c17ce5d0d5f
by kennethRevert "nir: replace lower_ffma and fuse_ffma with has_ffma"
This reverts commit 939ddf3f67de2ed1700c093e60cf95c1b72ff20b.
Intel has a separate pass for fusing FFMAs selectively. We split these flags in commit 1b72c31e1f1947123d8c236b56e230f030f60cf9 and the reasoning still stands. The patch being reverted was just a cleanup, so there should be no issue with reverting it.
Acked-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6849>
|
 | src/compiler/nir/nir_lower_flrp.c (diff) |
 | src/gallium/drivers/r600/r600_pipe_common.c (diff) |
 | src/gallium/drivers/nouveau/nv50/nv50_screen.c (diff) |
 | src/compiler/nir/nir_opt_algebraic.py (diff) |
 | src/gallium/drivers/zink/zink_compiler.c (diff) |
 | src/panfrost/bifrost/bifrost_compile.h (diff) |
 | src/panfrost/midgard/midgard_compile.h (diff) |
 | src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp (diff) |
 | src/intel/compiler/brw_compiler.c (diff) |
 | src/gallium/drivers/vc4/vc4_program.c (diff) |
 | src/compiler/nir/nir.h (diff) |
 | src/freedreno/ir3/ir3_nir.c (diff) |
 | src/amd/vulkan/radv_shader.c (diff) |
 | src/gallium/drivers/freedreno/a2xx/ir2_nir.c (diff) |
 | src/gallium/drivers/llvmpipe/lp_screen.c (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_screen.c (diff) |
 | src/gallium/drivers/lima/lima_program.c (diff) |
 | src/broadcom/compiler/nir_to_vir.c (diff) |
 | src/gallium/drivers/radeonsi/si_get.c (diff) |
Commit
f6c87216d3190bef3c5cbe66a934d0f72fb2fd64
by eric+margezink: use correct value for color buffer sample count when creating renderpass
nr_samples is valid on the texture pipe_resource, not the surface
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6263>
|
 | src/gallium/drivers/zink/zink_context.c (diff) |
Commit
e30367a27361bc561c2d1ab513f7d522ce9ada33
by eric+margezink: use correct number of samples on framebuffer in set_framebuffer_state
state->samples doesn't necessarily reflect the correct value here, so we need to use the util function
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6263>
|
 | src/gallium/drivers/zink/zink_context.c (diff) |
Commit
9ce1e99913dac4ccf323c786a0555e2b1e032188
by eric+margezink: use correct layer count when creating framebuffer
pipe_framebuffer_state::layers doesn't necessarily reflect the value we need to use here, so we can use the util function to verify
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6263>
|
 | src/gallium/drivers/zink/zink_context.c (diff) |
Commit
6feec2d40e0acef6b2b1950fd960a9bfc84258b2
by eric+margezink: clamp min created fb size to 1x1
this is required by spec
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6263>
|
 | src/gallium/drivers/zink/zink_context.c (diff) |
Commit
00515517016d3759543c097db68013fe287d8342
by eric+margezink: verify that src and dst aspects are the same in resource_copy_region hook
this is required by spec
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6263>
|
 | src/gallium/drivers/zink/zink_context.c (diff) |
Commit
818bd610992f1808f4d680a2e98aaa445dc8f442
by eric+margezink: implement ARB_instanced_arrays
this is just a simple case of connecting up the vertex state to the pipeline state
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6270>
|
 | src/gallium/drivers/zink/zink_screen.c (diff) |
 | src/gallium/drivers/zink/zink_pipeline.h (diff) |
 | src/gallium/drivers/zink/zink_state.c (diff) |
 | docs/features.txt (diff) |
 | src/gallium/drivers/zink/zink_pipeline.c (diff) |
 | src/gallium/drivers/zink/zink_state.h (diff) |
Commit
09be30b9e4c1d9246fb2084b6f30feed35f80c62
by eric+margezink: move viewport count to zink_gfx_pipeline_state
this is part of the pipeline state (there's an extension for setting it dynamically but we don't supprot that atm
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6349>
|
 | src/gallium/drivers/zink/zink_draw.c (diff) |
 | src/gallium/drivers/zink/zink_pipeline.h (diff) |
 | src/gallium/drivers/zink/zink_context.h (diff) |
 | src/gallium/drivers/zink/zink_context.c (diff) |
Commit
8a2ddcb4a940196a1698fe15a96963875bab47f0
by eric+margezink: set multiviewport cap in ntv when gl_ViewportIndex is a written output
this cap varies based on the shader stage, but it must be enabled any time this output is written
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6349>
|
 | src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c (diff) |
Commit
cc939fe9b7013b8d9c043cfae3444ca0a35e5f98
by eric+margezink: correctly set up fb-sized scissors for each viewport
each viewport must have a corresponding scissor, so we need to generate an array of these to ensure our states match up
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6349>
|
 | src/gallium/drivers/zink/zink_draw.c (diff) |
Commit
bc5c0433be806e458d0a91a9a7df342c70a5d1ee
by eric+margezink: apply viewport count when creating pipelines
without VK_EXT_extended_dynamic_state, we need to pass this directly or else only the first viewport will work
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6349>
|
 | src/gallium/drivers/zink/zink_pipeline.c (diff) |
Commit
7971918924dd84c2f33a5b7f0a8bf0c23ed994d8
by eric+margezink: reorder create_stream_output_target to fix failure case leak
the previous version of this leaked a reference to the streamout buffer here
thanks to deltragon on my blog for pointing this out!
Fixes: 37778fcd9a35 ("zink: implement transform feedback support to finish off opengl 3.0")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6457>
|
 | src/gallium/drivers/zink/zink_context.c (diff) |
Commit
472a20c5fc0feda0f074b4ff95fd7c7a6305c8cd
by eric+margeradeonsi: Only call nir_lower_var_copies at the end of the opt loop
In 283ad85944b5d, radeonsi started using nir_find_var_copies. However, it was also calling nir_lower_var_copies in the optimization loop and the two can end up fighting. The simple solution is to wait to lower copies until the end of the optimization loop.
Fixes: 283ad85944b5d Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3550
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6841>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
9ec28b8d226558aa2748dbf813b125f8938a09cc
by ericgallium/drm: Deduplicate screen creation for the dynamic (clover) pipe loader.
We can just reuse drm_helper.h, which has either the real code or the stub for all pipe_screens based on the GALLIUM_* driver defines, and the dynamic pipe loader's .c build will only define one GALLIUM_* driver define. The remaining stubs should get GCed by the linker.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6751>
|
 | src/gallium/targets/pipe-loader/pipe_nouveau.c (diff) |
 | src/gallium/targets/pipe-loader/pipe_kmsro.c (diff) |
 | src/gallium/targets/pipe-loader/pipe_r300.c (diff) |
 | src/gallium/targets/pipe-loader/pipe_r600.c (diff) |
 | src/gallium/targets/pipe-loader/pipe_i915.c (diff) |
 | src/gallium/targets/pipe-loader/pipe_vmwgfx.c (diff) |
 | src/gallium/targets/pipe-loader/pipe_msm.c (diff) |
 | src/gallium/targets/pipe-loader/pipe_radeonsi.c (diff) |
Commit
bc10b4968e83e9dd6306b540c0933b4e6fe1e366
by ericgallium/drm: Refactor the stub screen create functions.
This gives me one place to document why it works this way. This does make the debug message a little less helpful ("etna" instead of "etnaviv" and "vmwgfx" instead of "svga", but you should only be able to reach this when doing something like trying the radeon/nouveau vdpau target on the wrong DRM device for example.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6751>
|
 | src/gallium/auxiliary/target-helpers/drm_helper.h (diff) |
Commit
87392385b59d37cec9eee7ff3b733300d72a6789
by ericgallium/drm: Define the DRM entrypoints in drm_helper.h
This cuts even more code duplication.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6751>
|
 | src/gallium/targets/pipe-loader/meson.build (diff) |
 | src/gallium/targets/pipe-loader/pipe_r300.c (diff) |
 | src/gallium/targets/pipe-loader/pipe_kmsro.c (diff) |
 | src/gallium/auxiliary/target-helpers/drm_helper_public.h (diff) |
 | src/gallium/include/frontend/drm_driver.h (diff) |
 | src/gallium/targets/pipe-loader/pipe_nouveau.c (diff) |
 | src/gallium/targets/pipe-loader/pipe_msm.c (diff) |
 | src/gallium/targets/pipe-loader/pipe_i915.c (diff) |
 | src/gallium/targets/pipe-loader/pipe_vmwgfx.c (diff) |
 | src/gallium/auxiliary/target-helpers/drm_helper.h (diff) |
 | src/gallium/targets/pipe-loader/pipe_r600.c (diff) |
 | src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c (diff) |
 | src/gallium/targets/pipe-loader/pipe_radeonsi.c (diff) |
Commit
974981c4e6b9d41ca1129d08da1ed824c3c8c9f7
by ericgallium/drm: Make the pipe loader handle the driconf merging.
We can pretty easily handle merging the driver's driconf with the common driverconf right there, rather than pushing that to each driver.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6751>
|
 | src/gallium/drivers/iris/meson.build (diff) |
 | src/gallium/drivers/virgl/meson.build (diff) |
 | src/gallium/drivers/virgl/Android.mk (diff) |
 | src/gallium/drivers/v3d/meson.build (diff) |
 | src/util/merge_driinfo.py |
 | src/gallium/drivers/iris/driinfo_iris.h (diff) |
 | src/gallium/auxiliary/pipe-loader/pipe_loader.c (diff) |
 | src/gallium/auxiliary/target-helpers/drm_helper.h (diff) |
 | src/gallium/drivers/iris/Android.mk (diff) |
 | src/gallium/drivers/radeonsi/Android.mk (diff) |
 | src/gallium/drivers/radeonsi/driinfo_radeonsi.h (diff) |
 | src/gallium/drivers/radeonsi/meson.build (diff) |
 | src/gallium/include/frontend/drm_driver.h (diff) |
Commit
4bd0df0e4a8cd600c17a01b3bf297b0d06cb6e44
by vleer600/sfn: Initialize GPRValue member m_pin_to_channel.
Fix defects reported by Coverity Scan.
Uninitialized scalar field (UNINIT_CTOR) uninit_member: Non-static class member m_pin_to_channel is not initialized in this constructor nor in any functions that it calls.
Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6830>
|
 | src/gallium/drivers/r600/sfn/sfn_value_gpr.cpp (diff) |
Commit
03e7b75c22c0b3b55820be982ff9d98d704f3260
by eric+margegallium/dri2: Move image->texture assignment after image NULL check.
Fix defect reported by Coverity Scan.
Dereference before null check (REVERSE_INULL) check_after_deref: Null-checking image suggests that it may be null, but it has already been dereferenced on all paths leading to the check.
Fixes: ad609bf55a87 ("frontend/dri: Implement mapping individual planes.") Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6807>
|
 | src/gallium/frontends/dri/dri2.c (diff) |
Commit
3173367a478217d2cee3400805756393a02d3dd1
by eric+margespirv: vtn_fail with a nice message on unsupported rounding modes
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6845>
|
 | src/compiler/spirv/spirv_info_c.py (diff) |
 | src/compiler/spirv/vtn_alu.c (diff) |
 | src/compiler/spirv/spirv_info.h (diff) |
Commit
10be706778bd670197a66765c550cbb3a0cfda6d
by maraeonir: gather indirect info from lowered IO intrinsics
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6758>
|
 | src/compiler/nir/nir_gather_info.c (diff) |
Commit
abe9588ff048656c94d2074ca3d852ac371e0c7b
by maraeonir: gather tess.tcs_cross_invocation info from lowered IO intrinsics
Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6758>
|
 | src/compiler/nir/nir_gather_info.c (diff) |
|
 | src/compiler/nir/nir_gather_info.c (diff) |
 | src/compiler/nir/nir.c (diff) |
Commit
ef98c175c0180bebd3238ae77925a601c025cd24
by maraeonir: gather fs.uses_sample_qualifier from lowered IO
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6758>
|
 | src/compiler/nir/nir_gather_info.c (diff) |
Commit
a6abf175ef310c3a5b6960b3c04ecac5feb4eb84
by maraeonir: fix input/output info gathering for lowered IO
Ooops.
Fixes: 17af07024df - nir: gather all IO info from IO intrinsics
Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6758>
|
 | src/compiler/nir/nir_gather_info.c (diff) |
Commit
ea77958fea2b358a9b3de0bf5022e5c72ef63064
by maraeonir: gather information about fbfetch and dual source color
Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6758>
|
 | src/compiler/nir/nir_gather_info.c (diff) |
 | src/compiler/shader_info.h (diff) |
Commit
1dd4505bc1e7cd59119f2a3c092eed847092d611
by boris.brezillonpanfrost: gen_pack: Fix gnu-empty-initializer errors
Fixes: 1b27817f1755 ("panfrost: gen_pack: Allow empty structs") Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Tested-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6811>
|
 | src/panfrost/lib/gen_pack.py (diff) |
Commit
f7583bda8f085056ea87672801f948c07b5aec28
by boris.brezillonci: Extend meson-clang coverage by compiling all gallium drivers
Some compile-time regressions go unnoticed because not all gallium drivers are compiled as part of the meson-clang job. Let's pass an explicit list of drivers to compile instead of setting GALLIUM_DRIVERS to "auto" to increase CI coverage.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6811>
|
 | .gitlab-ci.yml (diff) |
Commit
a7e3cc7a0eafc1076a2f7775f754e74584fc3537
by eric+margeetnaviv: simplify linear stride implementation
As documented in the galcore kernel driver "only LOD0 is valid for this register". This makes sense, as NTE's LINEAR_STRIDE is only capable to store one linear stride value per sampler. This fixes linear textures in sampler slot != 0.
Fixes: 34458c1cf6c ("etnaviv: add linear sampling support") CC: <mesa-stable@lists.freedesktop.org> Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Michael Tretter <m.tretter@pengutronix.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3285>
|
 | src/gallium/drivers/etnaviv/etnaviv_texture_state.c (diff) |
Commit
8be46d6558e04f5dc9b8bebd31a36b1f3d593aa6
by maraeoradeonsi: fix indirect dispatches with variable block sizes
The block size input was uninitialized.
Fixes: 77c81164bc1c "radeonsi: support ARB_compute_variable_group_size"
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6782>
|
 | src/gallium/drivers/radeonsi/si_compute.c (diff) |
Commit
cce3556abdbae3a4d5e3f538f112a5f9b322d1ee
by maraeoradeonsi: call nir_shader_gather_info after lowering and optimizing NIR
to get more accurate info
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6782>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
343e5caa750fa3a3c77b1212564de167350de9bc
by maraeoradeonsi: use info.system_values_read
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6782>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
0280cc75ba456312649e466dfc9ebce2d6e6e1b0
by maraeoradeonsi: get information about FS color outputs from shader_info directly
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6782>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
8a1d556c5af1cf641bc50ed7d05e6d983dc33942
by maraeoradeonsi: get input/output usage flags from shader_info directly
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6782>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
0492adaca7359c4fcd6a06a71db0a6d013c38414
by maraeoradeonsi: run NIR optimizations that glsl_to_nir runs but other places might not
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6782>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
16afaf03555c06e1d0eb54ea4326c62745ccf90f
by maraeoradeonsi: assume that constant load_local_group_size has been optimized out
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6782>
|
 | src/gallium/drivers/radeonsi/si_shader_llvm.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
7b1e01fec7280123a31832cb3eefb627bbf34a3b
by maraeoradeonsi: remove redundant variables from struct si_compute
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6782>
|
 | src/gallium/drivers/radeonsi/si_compute.h (diff) |
 | src/gallium/drivers/radeonsi/si_compute.c (diff) |
Commit
d1d27e9db49c35a6888f88697f453770b62d1bdf
by maraeoradeonsi: remove redundant info.uses_fbfetch
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6782>
|
 | src/gallium/drivers/radeonsi/si_descriptors.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
9e94dcca67ab416cacee7646aca1010a78058837
by eric+margezink: correct typo in stencil-setup
Without this, we end up using two-sided stencil when one-sided stencil should be used. Whoops.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6853>
|
 | src/gallium/drivers/zink/zink_state.c (diff) |
Commit
4b2525b68dfe55691b0dfc84396f7a2c28d7dada
by eric+margezink: store base-object of DSA-state
This is useful in the next commit, where we need to inspect the base-state.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6853>
|
 | src/gallium/drivers/zink/zink_blit.c (diff) |
 | src/gallium/drivers/zink/zink_state.c (diff) |
 | src/gallium/drivers/zink/zink_pipeline.h (diff) |
 | src/gallium/drivers/zink/zink_context.h (diff) |
 | src/gallium/drivers/zink/zink_state.h (diff) |
Commit
cbef2dc7d3ca60df2307d04032395b2beeece2ec
by eric+margezink: only set stencil-ref for back if two-sided
Otherwise, we want to set both front and back to the same state.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6853>
|
 | src/gallium/drivers/zink/zink_draw.c (diff) |
Commit
77486db867bd39aa9b76e549c946b0a165fcb21a
by eric+margeintel/fs: Disable sample mask predication for scratch stores
Scratch stores are being lowered to the instructions with side-effects, however they should be enabled in fs helper invocations, since they are produced from operations which don't imply side-effects.
To fix this - we move the decision of whether the sample mask predication is enable to the point where logical brw instructions are created.
GLSL example of the issue:
int tmp[1024]; ... do { // changes to tmp } while (some_condition(tmp))
If `tmp` is lowered to scrach memory, `some_condition` would be undefined if scratch write is predicated on sample mask, making possible for the while loop to become infinite and hang the GPU.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3256 Fixes: 53bfcdeecf4c9632e09ee641d2ca02dd9ec25e34 Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Acked-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6056>
|
 | src/intel/compiler/brw_eu_defines.h (diff) |
 | src/intel/compiler/brw_fs_nir.cpp (diff) |
 | src/intel/compiler/brw_fs.cpp (diff) |
Commit
7b9cf779f27c4508aa2ba6e0074412e3d2c66a7f
by eric+margekmsro: Extend to include imx-dcss
This allows using the dcss display controllers (with the dcss drm modesetting driver) along with the Etnaviv render-only drivers. DCSS is found on i.MX SoCs.
Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3449>
|
 | src/gallium/targets/dri/target.c (diff) |
 | src/gallium/drivers/kmsro/Android.mk (diff) |
 | src/gallium/targets/dri/meson.build (diff) |
Commit
b8c31ac06d35f09792681a1e9311a044bac1df18
by eric+margelima: fix glCopyTexSubImage2D
The reload texture descriptor needs to take care of the mipmap level and the layer in case of GL_TEXTURE_CUBE_MAP.
glCopyTexSubImage2D triggers the lima_blit function which ends in a draw. A reload is necessary. The reload texture descriptor is always built with just one mipmap level, but this needs to be the level we want to reload, not just 0. We also have to take care of the cubemap face.
This fixes the following dEQP tests:
dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.2d_rgb dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.2d_rgba dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.cube_rgb dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.cube_rgba
Reviewed-by: Erico Nunes <nunes.erico@gmail.com> Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6816>
|
 | src/gallium/drivers/lima/lima_texture.h (diff) |
 | src/gallium/drivers/lima/lima_resource.c (diff) |
 | src/gallium/drivers/lima/lima_texture.c (diff) |
 | src/gallium/drivers/lima/lima_job.c (diff) |
Commit
a18c84ecce37a32ad394191a12e49c16858223cb
by eric+margenir/instr_set: hash intrinsic sources
ministat (CSE only): Difference at 95.0% confidence -9.80325 +/- 0.173089 -41.4434% +/- 0.461972% (Student's t, pooled s = 0.0763653)
ministat (entire run): Difference at 95.0% confidence -3.13667 +/- 0.61519 -5.11107% +/- 0.990737% (Student's t, pooled s = 0.271416)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Matt Turner <mattst88@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6860>
|
 | src/compiler/nir/nir_instr_set.c (diff) |
|
 | src/freedreno/vulkan/tu_cmd_buffer.c (diff) |
|
 | src/freedreno/vulkan/tu_clear_blit.c (diff) |
 | src/freedreno/vulkan/tu_cmd_buffer.c (diff) |
 | src/freedreno/vulkan/tu_pipeline.c (diff) |
Commit
dcba32bac08abfe71768a8b42e003b9350f3fef9
by eric+margeturnip: implement VK_EXT_extended_dynamic_state
Passes dEQP-VK.pipeline.extended_dynamic_state.*
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5641>
|
 | src/freedreno/vulkan/tu_device.c (diff) |
 | src/freedreno/vulkan/tu_cmd_buffer.c (diff) |
 | src/freedreno/vulkan/tu_pipeline.c (diff) |
 | src/freedreno/vulkan/tu_extensions.py (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
Commit
0206fb39418786e069088c513bf392d564d3d0f9
by eric+margenir/liveness: Consider if uses in nir_ssa_defs_interfere
Fixes: f86902e75d9 "nir: Add an SSA-based liveness analysis pass" Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3428 Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Yevhenii Kharchenko <yevhenii.kharchenko@globallogic.com> Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6824>
|
 | src/compiler/nir/nir_liveness.c (diff) |
Commit
b54a0bb528393ba53c5bedf164790d6974627ebf
by eric+margefreedreno/layout: add tile_all flag to the layout
Added a new tile_all flag which is used to set the TILE_ALL flag of the texture. Enabled tile_all to depth/stencil images are they are non-linear.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Reviewed-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6848>
|
 | src/freedreno/fdl/fd6_layout.c (diff) |
 | src/freedreno/vulkan/tu_image.c (diff) |
 | src/gallium/drivers/freedreno/a6xx/fd6_image.c (diff) |
 | src/gallium/drivers/freedreno/a6xx/fd6_texture.c (diff) |
 | src/freedreno/fdl/freedreno_layout.h (diff) |
|
 | meson.build (diff) |
Commit
7f3e881c6cd179a9a541a673f0fc67ef63e50cea
by eric+margeblorp: Ensure aligned HIZ_CCS_WT partial clears
Fixes: 5425fcf2cb3 ("intel/blorp: Satisfy HIZ_CCS fast-clear alignments") Reported-by: Sagar Ghuge <sagar.ghuge@intel.com> Tested-by: Ivan Briano <ivan.briano@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6854>
|
 | src/intel/blorp/blorp_clear.c (diff) |
Commit
1eb79dfadedb8b77cdc55a6a11f859c1e53521d4
by eric+margeutil/xmlconfig: Add a unit test of the code.
I want to build a non-XML-based alternative for Android, and to do that I want to know that my equivalent code still works.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6753>
|
 | src/util/xmlconfig.h (diff) |
 | src/util/driconf.h (diff) |
 | src/util/tests/xmlconfig.cpp |
 | src/util/meson.build (diff) |
Commit
e5d2481bfe761816bae173856262b0232a92b07b
by eric+margevirgl: Clean up the driconf definition of GLES_SAMPLES_PASSED_VALUE.
The right values ended up being passed to DRI_CONF_OPT_BEGIN_V, they were just named wrong.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6753>
|
 | src/util/driconf.h (diff) |
 | src/gallium/drivers/virgl/virgl_driinfo.h.in (diff) |
Commit
b4a087ce1b939257a652f545a66d9a85c1fd8dc8
by eric+margedriconf: Use nesting macros for defining options.
Manually balancing the BEGIN/ENDs is a recipe for xml validation failures, just make the macros do the balancing. The only ugly bit I think is that enums take a list of DRI_CONF_ENUM() without ','s in between them.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6753>
|
 | src/util/driconf.h (diff) |
 | src/mesa/drivers/dri/i965/intel_screen.c (diff) |
 | src/mesa/drivers/dri/radeon/radeon_screen.c (diff) |
 | src/mesa/drivers/dri/radeon/radeon_screen.h (diff) |
 | src/mesa/drivers/dri/i915/intel_screen.c (diff) |
 | src/gallium/drivers/iris/driinfo_iris.h (diff) |
 | src/gallium/drivers/radeonsi/driinfo_radeonsi.h (diff) |
 | src/util/tests/xmlconfig.cpp (diff) |
Commit
93db59e0664fbbc9d711b43145f18e6e6bce16fa
by eric+margenir: Add an internal flag to shader_info
Don't print the shader if it's marked internal, unless NIR_PRINT has been explicitly set to 2 (or higher).
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6035>
|
 | src/compiler/nir/nir.h (diff) |
 | src/compiler/shader_info.h (diff) |
Commit
2826a5a92328fd78d3ed44478164ac3065f3e5f2
by eric+margenir: Add glsl_base_type unsigned -> signed version helper
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6035>
|
 | src/compiler/glsl_types.h (diff) |
Commit
c9a6b94f9ea50f73f016db4724472d87c9fb2334
by eric+margevtn: add an option to create a nir library from spirv
This adds an options to turn a spir-v library into a set of nir functions. There is no entry point and all function implentations are emitted.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6035>
|
 | src/compiler/spirv/nir_spirv.h (diff) |
 | src/compiler/spirv/spirv_to_nir.c (diff) |
Commit
938be4d6fabfbef4c3668f73c449d45e1d8ca518
by eric+margenir/vtn: Add handling for SPIR-V event variables
Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6035>
|
 | src/compiler/spirv/spirv_to_nir.c (diff) |
 | src/compiler/spirv/vtn_private.h (diff) |
Commit
2013903bc2412b1d2ea3252f711c34a2658c9658
by eric+margevtn/opencl: Rework type handling for CL extension opcodes
- Change dest type information to be vtn_type rather than glsl_type - Add source type information, also in vtn_type form
Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6035>
|
 | src/compiler/spirv/vtn_opencl.c (diff) |
Commit
45d43ad2b8d01cce7766f8d7f5868e5f77058b91
by eric+margeclover/nir: add libclc lowering pass
This pass goes through all the functions in the shader, checks if the matching function is in the clc spir-v library and inlines the replacement from there it is.
v2 (daniels): Also copy variables from the libclc shader v3 (jekstrand): Fix progress return, only run variable inlining once v4 (jekstrand): Have function inlining also copy vars for us
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6035>
|
 | src/gallium/frontends/clover/nir/nir_lower_libclc.h |
 | src/gallium/frontends/clover/nir/nir_lower_libclc.c |
 | src/gallium/frontends/clover/meson.build (diff) |
Commit
6436e3ac18981317b9d37dc966a51d1c3ce63b86
by eric+margevtn/opencl: Add infrastructure for calling out to libclc
This patch adds a function remap table with name mangling, which can convert a SPIR-V OpenCL extension opcode to a call to the external libclc shader, which will be lowered/inlined after conversion.
Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6035>
|
 | src/compiler/spirv/nir_spirv.h (diff) |
 | src/compiler/spirv/vtn_opencl.c (diff) |
Commit
14bc2dcaae0e08bd4d5a4406b6778feaeb01ce7c
by eric+margeutil: add missing extern C
This code is included in c++ code via disk_cache in theory, in practice it never has been.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6035>
|
 | src/util/build_id.h (diff) |
Commit
f33b417652ceae711cc34601f51d62beec2d22f1
by eric+margeclover: handle libclc shader (v3)
This works by taking the spirv produced by libclc which contains a lot of mangled function entrypoints identified with LinkageAttribute decorations.
This patch just sets up clover to load the libclc blob and convert it to library nir, and support inlining application nir with calls to libclc.
v2: Add a disk cache support for this object, to avoid the spirv parsing overheads each time. move spirv->nir to lazy instantiation to avoid the mess with glsl types and constructor ordering. v3: make disk cache optional
v1-Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6035>
|
 | src/gallium/frontends/clover/nir/invocation.cpp (diff) |
 | src/gallium/frontends/clover/core/device.cpp (diff) |
 | src/gallium/frontends/clover/core/device.hpp (diff) |
 | src/gallium/frontends/clover/meson.build (diff) |
 | src/gallium/frontends/clover/spirv/invocation.cpp (diff) |
 | src/gallium/frontends/clover/nir/invocation.hpp (diff) |
 | src/gallium/frontends/clover/spirv/invocation.hpp (diff) |
|
 | src/compiler/spirv/vtn_opencl.c (diff) |
Commit
00261d883ddce9e7238b9cea9dd3f09e49e68a93
by eric+margevtn/opencl: Rework handle_instr to be able to handle core SPIR-V opcodes via libclc
The OpenCL async copy/wait opcodes are core SPIR-V, rather than OpenCL extension opcodes.
Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6035>
|
 | src/compiler/spirv/vtn_opencl.c (diff) |
Commit
6aee49578fbc3c157495aa15b1d784c7a43f2e1a
by eric+margevtn/opencl: Hook up OpenCL async copy and group wait opcodes via libclc
Adds an additional hook for spirv_to_nir to handle a core opcode via the OpenCL libclc infrastructure, and adds handling for SpvOpGroupAsyncCopy and SpvOpGroupWaitEvents.
Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6035>
|
 | src/compiler/spirv/vtn_private.h (diff) |
 | src/compiler/spirv/vtn_opencl.c (diff) |
 | src/compiler/spirv/spirv_to_nir.c (diff) |
Commit
4cc9ad4eeb4bfb2fd3e0c6d1def2823a48137d61
by eric+margevtn/opencl: Switch non-native trig to use libclc
Acked-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6035>
|
 | src/compiler/spirv/vtn_opencl.c (diff) |
Commit
2624faf1379f515cee1c4e307ff8abe56d19b2a0
by eric+margevtn/opencl: Switch exp/pow/log to use libclc
Acked-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6035>
|
 | src/compiler/spirv/vtn_opencl.c (diff) |
Commit
03fd217d219722dedc3c04726b2a4288e289179b
by eric+margevtn/opencl: Switch division-related ops to use libclc
Specifically, fmod only uses libclc if it was going to be lowered. Also, add missing half_divide and half_recip handling.
Acked-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6035>
|
 | src/compiler/spirv/vtn_opencl.c (diff) |
Commit
09bca4cb957e33811c82d3bf5b41527ae7122f22
by jenatalivtn/opencl: Switch some nir-sequence ops to use libclc
All of these are pretty well-defined. Rather than implementing them as a sequence of nir ops, we can just use the libclc implementation.
v2 (idr): Delete functions that are now unused.
Acked-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6035>
|
 | src/compiler/nir/nir_builtin_builder.h (diff) |
 | src/compiler/spirv/vtn_opencl.c (diff) |
 | src/compiler/nir/nir_builtin_builder.c (diff) |
|
 | src/compiler/spirv/vtn_opencl.c (diff) |
Commit
5f1855d896cae59eee6099bb48ac00aae883c2c7
by jenatalivtn/opencl: Switch fma to conditionally use libclc for 32bit floats
Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6035>
|
 | src/compiler/spirv/vtn_opencl.c (diff) |
Commit
465460943a2bf049e83a602d70f921775245dbca
by eric+margemeson/anv: Use variable that checks for --build-id
fixes: d1992255bb29054fa51763376d125183a9f602f3 ("meson: Add build Intel "anv" vulkan driver")
Acked-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6819>
|
 | src/intel/vulkan/meson.build (diff) |
Commit
4cb6a8d2dee5f1ef56f26090441fa9d1758ecce5
by eric+margegallivm: add support for lowered IO in vertex shaders
for Selection/Feedback/RasterPos in st/mesa.
Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6698>
|
 | src/gallium/auxiliary/nir/nir_to_tgsi_info.c (diff) |
 | src/gallium/auxiliary/gallivm/lp_bld_nir.c (diff) |
|
 | src/compiler/nir_types.h (diff) |
 | src/compiler/nir_types.cpp (diff) |
|
 | src/compiler/spirv/spirv_to_nir.c (diff) |
Commit
b2899f72657a006489284def54f9a5373f8a1d1e
by eric+margenir: Add a new memcpy intrinsic
This matches SPIR-V's OpCopyMemorySized
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6713>
|
 | src/compiler/nir/nir_intrinsics.py (diff) |
 | src/compiler/nir/nir_builder.h (diff) |
|
 | src/compiler/nir/nir_lower_memcpy.c |
 | src/compiler/nir/nir.h (diff) |
 | src/compiler/Makefile.sources (diff) |
 | src/compiler/nir/meson.build (diff) |
|
 | src/compiler/spirv/vtn_variables.c (diff) |
|
 | src/gallium/frontends/clover/nir/invocation.cpp (diff) |
Commit
a3543adc2628461818cfa691a7f547af7bc6f0fb
by edbclover: set LLVM min version to 8.0.1
It also bump from 8.0.0 to .1 for AMD gallium and VK
Reviewed-by: Francisco Jerez <currojerez@riseup.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6336>
|
 | src/gallium/frontends/clover/llvm/codegen/bitcode.cpp (diff) |
 | .gitlab-ci.yml (diff) |
 | src/gallium/frontends/clover/llvm/codegen/native.cpp (diff) |
 | src/gallium/frontends/clover/llvm/compat.hpp (diff) |
 | src/gallium/frontends/clover/llvm/invocation.cpp (diff) |
 | meson.build (diff) |
 | src/gallium/frontends/clover/llvm/codegen/common.cpp (diff) |
Commit
4017116fa044468234934812986a66cb8e807f60
by eric+margeci: add dEQP-VK.info.device_extensions to the list of skipped tests
It regularly fails when a new KHR extension is implemented.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6843>
|
 | .gitlab-ci/deqp-radv-default-skips.txt (diff) |
Commit
6abb4cd8b9d8c8dddd3c1d4b55ed0a2f77ed0617
by boris.brezillonpanfrost: Fix bifrost tiler descriptor definition
The bifrost tiler descriptor definition was wrong, leading to a buffer overflow.
Fixes: efce73d99d0e ("panfrost: XML-ify the bifrost tiler descriptors") Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Tested-by: Christian Hewitt <christianshewitt@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6859>
|
 | src/panfrost/lib/midgard.xml (diff) |
Commit
2e9599b34d1fc386570027f3be0cced908ed7849
by boris.brezillonpanfrost: Fix bifrost tiler job emission
The tiler descriptor pointer and padding sections were not filled.
Fixes: d289209ea68f ("panfrost: XML-ify the compute job descriptor") Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Tested-by: Christian Hewitt <christianshewitt@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6859>
|
 | src/gallium/drivers/panfrost/pan_context.c (diff) |
Commit
9a221095d270822aab734067956bc51658452f6b
by issor.oruamandroid: pan/bi: fix typo in bifrost_gen_disasm.c gen rules
Gen rules were erroneusly named as bifrost_gen_disasm*s* This patch fixes them
Fixes: 792b51713bf4 ("android: pan/bi: Use new disassembler") Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6873>
|
 | src/panfrost/Android.bifrost.mk (diff) |
Commit
92831412d95a1af33829d83a4d5cd0e33f5e3494
by eric+margelima: set clear depth value to 0x00ffffff as default
According to the specs, the initial depth value for a depth buffer clear is 1. Use 0x00ffffff like the blob does.
We can remove setting this value in lima_clear, because it's set during job creation now.
Fixes the following dEQP tests:
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgb565_depth_component16 dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgb5_a1_depth_component16 dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgb4_depth_component16 dEQP-GLES2.functional.fbo.render.shared_depthbuffer.tex2d_rgba_depth_component16 dEQP-GLES2.functional.fbo.render.shared_depthbuffer.tex2d_rgb_depth_component16
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6842>
|
 | src/gallium/drivers/lima/lima_draw.c (diff) |
 | src/gallium/drivers/lima/lima_job.c (diff) |
Commit
96ac7115dbd4afb39e871887690a9c9a86689f0c
by eric+margedocs: escape backquote character
This unescaped backquote charcter confuses Sphinx, making it emit a warning and slightly confused HTML in the end.
Let's escape it instead, to keep things sane.
Fixes: fdff24d930d ("docs: add release notes for 20.1.8") Reviewed-by: Eric Engestrom <eric@engestrom.ch> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6863>
|
 | docs/relnotes/20.1.8.rst (diff) |
Commit
12760d0480d53da7218773ce3edae091e59607cb
by eric+margedocs: show 'Edit on GitLab'-link
It's easier to contribute to the documentation if we have links to the document on GitLab. This will allow people to easily edit docs, or to realize where in the source-tree they are without having to search.
Reviewed-by: Eric Engestrom <eric@engestrom.ch> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6742>
|
 | docs/conf.py (diff) |
Commit
d2dfbf0e66bde6f671575fd6fe0c50e2facc2420
by eric+margedocs: store prefixes in redirects
This allows us to link to articles that are using pretty-URLs without adding an ugly "/index.html"-suffix to them.
Reviewed-by: Eric Engestrom <eric@engestrom.ch> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6862>
|
 | docs/_exts/redirects.py (diff) |
Commit
e48b77b5b1489a0efa802f25f6457f3b70a96291
by eric+margedocs: remove webmaster article
This article is out-of-date, so let's instead forward to the "About Mesa3D.org" article on the main website. This explains where to submit merge requests for wanted changes.
Reviewed-by: Eric Engestrom <eric@engestrom.ch> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6862>
|
 | docs/_exts/redirects.py (diff) |
 | docs/contents.rst (diff) |
 | docs/webmaster.rst |
|
 | docs/gallium/context.rst (diff) |
|
 | docs/gallium/context.rst (diff) |
|
 | docs/install.rst (diff) |
|
 | docs/gallium/context.rst (diff) |
|
 | docs/gallium/cso/blend.rst (diff) |
|
 | docs/gallium/context.rst (diff) |
Commit
9890927a84d44ffe6e14c107e896fd23e889814a
by eric+margedocs: behaviour -> behavior
Most of our documentation is US English, so let's stick to that.
Reviewed-by: Eric Engestrom <eric@engestrom.ch> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6864>
|
 | docs/gallium/cso/rasterizer.rst (diff) |
 | docs/gallium/cso/sampler.rst (diff) |
 | docs/gallium/context.rst (diff) |
 | docs/envvars.rst (diff) |
|
 | docs/releasing.rst (diff) |
Commit
0894b590a45c0cdc57dc82e5cbb24891ad203a1f
by eric+margedocs: initialisation -> initialization
Most of the docs is US English, let's stick to that.
Reviewed-by: Eric Engestrom <eric@engestrom.ch> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6864>
|
 | docs/egl.rst (diff) |
|
 | docs/ci/index.rst (diff) |
 | docs/ci/docker.rst (diff) |
 | docs/releasing.rst (diff) |
 | docs/submittingpatches.rst (diff) |
 | docs/repository.rst (diff) |
 | docs/ci/LAVA.rst (diff) |
 | docs/ci/bare-metal.rst (diff) |
|
 | docs/submittingpatches.rst (diff) |
 | docs/repository.rst (diff) |
 | docs/ci/LAVA.rst (diff) |
Commit
5bea0e88ba0dd0b0d1221c7ba76720c9fc9c0dc4
by eric+margedocs: recognisable -> recognizable
Most of the docs is US English, let's stick to that.
Reviewed-by: Eric Engestrom <eric@engestrom.ch> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6864>
|
 | docs/download.rst (diff) |
Commit
f2b94ae085ab454944e03fbb9d91bc65bf40abc8
by eric+margeglsl/linker: Add support for XFB varying lowering in geometry shader
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6723>
|
 | src/compiler/glsl/lower_xfb_varying.cpp (diff) |
 | src/compiler/glsl/link_varyings.cpp (diff) |
 | src/mesa/state_tracker/st_extensions.c (diff) |
Commit
d9c4ec91542662f7297591b92ed6c4a452004d2b
by eric+margepanfrost: Remove extra printf arguments.
Fix defects reported by Coverity Scan.
Extra argument to printf format specifier (PRINTF_ARGS) extra_argument: This argument was not used by the format string: job + 32UL.
Fixes: 89fafe9e926b ("panfrost: XML-ify the fragment job descriptor") Fixes: d289209ea68f ("panfrost: XML-ify the compute job descriptor") Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6829>
|
 | src/panfrost/lib/decode.c (diff) |
Commit
ee073cb543ea0e10cc5933caba8a288897c7e4ea
by eric+margenir/load_store_vectorize: improve vectorization with identical operations
We might have several identical options to vectorize an entry with, but only one might be vectorizable because of writes interfering.
An example of this is a pattern found in some CTS tests: a = load(0) b = load(4) store(0, a) store(4, b) a = load(0) b = load(4) store(0, a) store(4, b) ...
It might have attempted to vectorize the first load(0) with the second load(4) without attempting the second load(4) when the first fails. This changes vectorize_entries() to continue even if the first try_vectorize() failed.
fossil-db (Navi): Totals from 117 (0.09% of 137413) affected shaders: SGPRs: 7040 -> 7088 (+0.68%) CodeSize: 276504 -> 276308 (-0.07%); split: -0.08%, +0.01% Instrs: 51152 -> 51111 (-0.08%); split: -0.09%, +0.01%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5415>
|
 | src/compiler/nir/nir_opt_load_store_vectorize.c (diff) |
Commit
90eaaada0d1d2479c777241948e8ec59d7cfe996
by eric+margepanfrost: Mark blit shaders as internal
Fixes spam of blit shader nir when NIR_PRINT=1 is set.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6870>
|
 | src/panfrost/lib/pan_blit.c (diff) |
Commit
756441b2979c2664aaa13a67dbdaf5b7e853286e
by eric+margepan/mdg: Infer whether to disassemble shaders from info.internal
Blit shaders are now marked as internal, so remove the silent argument from midgard_compile_shader_nir and instead use nir->info.internal to suppress disassembling shaders.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6870>
|
 | src/panfrost/midgard/midgard_compile.h (diff) |
 | src/panfrost/lib/pan_blit.c (diff) |
 | src/gallium/drivers/panfrost/pan_blend_shaders.c (diff) |
 | src/gallium/drivers/panfrost/pan_assemble.c (diff) |
 | src/panfrost/midgard/midgard_compile.c (diff) |
Commit
de1409089c797cc3dfae968748610d57329ec555
by eric+margenir/lower_memory_model: return progress when visiting instructions
It never returned progress=TRUE.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6888>
|
 | src/compiler/nir/nir_lower_memory_model.c (diff) |
Commit
39098a2053d4619faff8bc125eac412270a1bdec
by eric+margenir/lower_memory_model: do not break with global atomic operations
Global atomics don't have an access flag.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6888>
|
 | src/compiler/nir/nir_lower_memory_model.c (diff) |
Commit
f1432fd3e2d915f09a295f1ffb878471ce4e4d73
by eric+margezink: generate extension infrastructure using a python script
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6789>
|
 | src/gallium/drivers/zink/zink_device_info.py |
Commit
0ed17a212c75ec0b2c69de714a20254b88ffb7c9
by eric+margezink: hook zink_device_info.py to build system
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6789>
|
 | src/gallium/drivers/zink/zink_screen.c (diff) |
 | src/gallium/drivers/zink/zink_screen.h (diff) |
 | src/gallium/drivers/zink/meson.build (diff) |
Commit
79c0023d196c183bca4a5a66522e1432f8f95f10
by eric+margezink: use the new extension infrastructure in device creation
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6789>
|
 | src/gallium/drivers/zink/zink_screen.c (diff) |
Commit
08d51e92aee0cddc5ad567dddd432cc4016a4570
by eric+margezink: use the new, generated extension infrastructure
this is just a find-and-replace from screen->... to screen->info.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6789>
|
 | src/gallium/drivers/zink/zink_state.c (diff) |
 | src/gallium/drivers/zink/zink_screen.c (diff) |
 | src/gallium/drivers/zink/zink_draw.c (diff) |
 | src/gallium/drivers/zink/zink_context.c (diff) |
 | src/gallium/drivers/zink/zink_resource.c (diff) |
Commit
b2d042b62107cca4612d47f216c89ad0ad5a12f1
by eric+margezink: remove old extension infrastructure
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6789>
|
 | src/gallium/drivers/zink/zink_screen.h (diff) |
 | src/gallium/drivers/zink/zink_screen.c (diff) |
Commit
929aac5d350f8463310f3a32aded6bb9e412b14a
by eric+margeradv: Fix emitting SQTT userdata.
Otherwise some marker packets were missing ...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6550>
|
 | src/amd/vulkan/layers/radv_sqtt_layer.c (diff) |
 | src/amd/vulkan/radv_cs.h (diff) |
 | src/amd/vulkan/radv_private.h (diff) |
 | src/amd/vulkan/radv_sqtt.c (diff) |
Commit
8349b820831276b2deec494b7c4e550389c39f78
by eric+margeradv: Use correct alignment for SQTT buffer sizes.
Otherwise we can miss the start of the buffer, which results in RGP missing the initial (and only) timestamp packet and results in RGP completely ignoring the second SE, causing messy issues and missed events.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6550>
|
 | src/amd/vulkan/radv_sqtt.c (diff) |
|
 | src/amd/vulkan/radv_rgp.c (diff) |
Commit
cc731821527acd4469775990d24952f40ffe22f4
by eric+margeradv: Include flushes in the barrier.
Since the flushes really happen on the next draw delay the barrier end to include the flushes.
This fixes the barrier duration in RGP.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6550>
|
 | src/amd/vulkan/radv_cmd_buffer.c (diff) |
 | src/amd/vulkan/layers/radv_sqtt_layer.c (diff) |
 | src/amd/vulkan/radv_private.h (diff) |
 | src/amd/vulkan/si_cmd_buffer.c (diff) |
Commit
78165ea3e2085491abd91df340dc822071d389b5
by eric+margeradv: Record cache flushes for RGP.
Not doing the EOP TS cacheflush event because that break wave counting in RGP for some reason. But the rest looks to be all there.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6550>
|
 | src/amd/vulkan/radv_device.c (diff) |
 | src/amd/vulkan/radv_private.h (diff) |
 | src/amd/vulkan/layers/radv_sqtt_layer.c (diff) |
 | src/amd/vulkan/radv_sqtt.c (diff) |
 | src/amd/vulkan/si_cmd_buffer.c (diff) |
 | src/amd/vulkan/radv_cmd_buffer.c (diff) |
Commit
13ea7db760b13ce8dd68ccbdb5aee590198b2414
by ericmesa: Promote Intel's simple logging façade for Android to util/
I'm bringing up freedreno Vulkan on an Android phone, and my pains are exactly what Chad said when working on Intel's vulkan for Android in aa716db0f64d ("intel: Add simple logging façade for Android (v2)"):
On Android, stdio goes to /dev/null. On Android, remote gdb is even more painful than the usual remote gdb. On Android, nothing works like you expect and debugging is hell. I need logging.
This patch introduces a small, simple logging API that can easily wrap Android's API. On non-Android platforms, this logger does nothing fancy. It follows the time-honored Unix tradition of spewing everything to stderr with minimal fuss.
My goal here is not perfection. My goal is to make a minimal, clean API, that people hate merely a little instead of a lot, and that's good enough to let me bring up Android Vulkan. And it needs to be fast, which means it must be small. No one wants to their game to miss frames while aiming a flaming bow into the jaws of an angry robot t-rex, and thus become t-rex breakfast, because some fool had too much fun desiging a bloated, ideal logging API.
Compared to trusty fprintf, _mesa_log[ewi]() is actually usable on Android. Compared to os_log_message(), this has different error levels and supports format arguments.
The only code change in the move is wrapping flockfile/funlockfile in !DETECT_OS_WINDOWS, since mingw32 doesn't have it. Windows likely wants different logging code, anyway.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6806>
|
 | src/intel/tools/intel_sanitize_gpu.c (diff) |
 | src/intel/common/intel_log.h |
 | src/util/meson.build (diff) |
 | src/intel/vulkan/genX_cmd_buffer.c (diff) |
 | src/intel/vulkan/anv_private.h (diff) |
 | src/util/log.c |
 | src/util/Makefile.sources (diff) |
 | src/intel/common/meson.build (diff) |
 | src/util/log.h |
 | src/intel/vulkan/anv_perf.c (diff) |
 | src/intel/Makefile.sources (diff) |
 | src/intel/vulkan/anv_android.c (diff) |
 | src/intel/vulkan/anv_device.c (diff) |
 | src/intel/common/intel_log.c |
 | src/intel/vulkan/anv_util.c (diff) |
Commit
a55dc276a38fa8d146386079459cc85c8a7647ae
by ericturnip: Replace tu_log*() with mesa_log*()
This gets us logging on Android.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6806>
|
 | src/freedreno/vulkan/tu_drm.c (diff) |
 | src/freedreno/vulkan/tu_kgsl.c (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
 | src/freedreno/vulkan/tu_util.c (diff) |
 | src/freedreno/vulkan/tu_device.c (diff) |
|
 | .gitlab-ci/traces-freedreno.yml (diff) |
Commit
4ed904989fc535db0154def100569d16683213bd
by eric+margeci/freedreno: Add trace tests for glxgears, 0 A.D., and xonotic.
glxgears is now trimmed to not be tons of frames, and we've picked up a couple more traces in the public repo.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6716>
|
 | .gitlab-ci/traces-freedreno.yml (diff) |
Commit
e8c5f8b9d3288d9a9e679a1c453fd015d1a359cf
by eric+margenir/lower_clip: Add i/o semantics for load/store intrinsics.
ir3 looks at the .location on its inputs for handling non-VARYING_SLOT_POS, but our uninitialized semantics matched that and threw a compiler assertion failure.
Fixes: 502abfce7f5d ("nir: save IO semantics in lowered IO intrinsics") Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6716>
|
 | src/compiler/nir/nir_lower_clip.c (diff) |
 | .gitlab-ci/traces-freedreno.yml (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_ir_to_assembly.cpp (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.cpp (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_nir.cpp (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_shader_base.cpp (diff) |
Commit
8540523610e29e983375fbd879c31ae4debf5c8d
by eric+marger600/sfn: save some instructions when doing multisample on sample 0
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6879>
|
 | src/gallium/drivers/r600/sfn/sfn_emittexinstruction.cpp (diff) |
Commit
a8435f70ed5fee46dbc982ec68206f3c4fdd81a7
by eric+marger600/sfn: use fine gradient evaluation for interpolate_at_offset
Also pass in the interpolator x component (because the TGSI does this too)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6879>
|
 | src/gallium/drivers/r600/sfn/sfn_shader_fragment.cpp (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_shader_fragment.h (diff) |
 | src/gallium/drivers/r600/sfn/sfn_shader_fragment.cpp (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_value.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_instruction_base.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_instruction_block.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_emitinstruction.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_emitinstruction.h (diff) |
 | src/gallium/drivers/r600/sfn/sfn_ir_to_assembly.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_value.h (diff) |
 | src/gallium/drivers/r600/r600_asm.c (diff) |
 | src/gallium/drivers/r600/sfn/sfn_shader_base.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_instruction_block.h (diff) |
 | src/gallium/drivers/r600/sfn/sfn_shader_base.h (diff) |
 | src/gallium/drivers/r600/sfn/sfn_liverange.cpp (diff) |
Commit
6784cea646b0d5f7dde4827b52ea269f53210d67
by eric+marger600/sfn; go back to not lowering uniforms to UBOs
Lowering uniforms to UBOs results in an aditional iadd for the UBO buffer id evaluation, and for indirect buffers access that results in an unnecessary op that can be avoided by not lowering uniforms. There is some code duplication when reading the uniforms but it saves a whole instruction group per indirect cont buffer access.
This reverts commit 98eb00face93b9af5aac19008ecff5a2bf376745 with some additional fixes.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6879>
|
 | src/gallium/drivers/r600/sfn/sfn_shader_base.h (diff) |
 | src/gallium/drivers/r600/sfn/sfn_value.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_shader_base.cpp (diff) |
 | src/gallium/drivers/r600/r600_pipe_common.c (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_emitinstruction.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_nir.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_shader_geometry.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_valuepool.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_valuepool.h (diff) |
 | src/gallium/drivers/r600/sfn/sfn_emitinstruction.h (diff) |
 | src/gallium/drivers/r600/sfn/sfn_emittexinstruction.cpp (diff) |
Commit
6aa196b673ea741fdc7f4ceda4976b635091d48b
by eric+marger600/sfn: remove old code to track uniforms as it is no longer needed
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6879>
|
 | src/gallium/drivers/r600/sfn/sfn_valuepool.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_shader_base.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_emitinstruction.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_emitinstruction.h (diff) |
 | src/gallium/drivers/r600/sfn/sfn_shader_base.h (diff) |
 | src/gallium/drivers/r600/sfn/sfn_valuepool.h (diff) |
|
 | src/gallium/drivers/r600/sfn/sfn_shader_fragment.cpp (diff) |
 | src/gallium/drivers/r600/sfn/sfn_shader_base.h (diff) |
 | src/gallium/drivers/r600/sfn/sfn_shader_fragment.h (diff) |
Commit
9bcdca2455e894da9d71a73562be9b9084b672a8
by ian.d.romanickintel/vec4: Silence unused paramter warnings in brw_vec4_generator.cpp
src/intel/compiler/brw_vec4_generator.cpp: In function ‘void generate_gs_svb_write(brw_codegen*, brw_vue_prog_data*, brw::vec4_instruction*, brw_reg, brw_reg, brw_reg)’: src/intel/compiler/brw_vec4_generator.cpp:488:49: warning: unused parameter ‘prog_data’ [-Wunused-parameter] 488 | struct brw_vue_prog_data *prog_data, | ~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~ src/intel/compiler/brw_vec4_generator.cpp: In function ‘void generate_pull_constant_load(brw_codegen*, brw_vue_prog_data*, brw::vec4_instruction*, brw_reg, brw_reg, brw_reg)’: src/intel/compiler/brw_vec4_generator.cpp:1269:55: warning: unused parameter ‘prog_data’ [-Wunused-parameter] 1269 | struct brw_vue_prog_data *prog_data, | ~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~ src/intel/compiler/brw_vec4_generator.cpp: In function ‘void generate_get_buffer_size(brw_codegen*, brw_vue_prog_data*, brw::vec4_instruction*, brw_reg, brw_reg, brw_reg)’: src/intel/compiler/brw_vec4_generator.cpp:1331:52: warning: unused parameter ‘prog_data’ [-Wunused-parameter] 1331 | struct brw_vue_prog_data *prog_data, | ~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~ src/intel/compiler/brw_vec4_generator.cpp: In function ‘void generate_pull_constant_load_gen7(brw_codegen*, brw_vue_prog_data*, brw::vec4_instruction*, brw_reg, brw_reg, brw_reg)’: src/intel/compiler/brw_vec4_generator.cpp:1357:60: warning: unused parameter ‘prog_data’ [-Wunused-parameter] 1357 | struct brw_vue_prog_data *prog_data, | ~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6826>
|
 | src/intel/compiler/brw_vec4_generator.cpp (diff) |
Commit
92f08860c9718c4e62fe94146f53a04fe1656f2e
by ian.d.romanickintel/compiler: Silence unused parameter warning in brw_surface_payload_size
src/intel/compiler/brw_eu_emit.c: In function ‘brw_surface_payload_size’: src/intel/compiler/brw_eu_emit.c:3070:46: warning: unused parameter ‘p’ [-Wunused-parameter] 3070 | brw_surface_payload_size(struct brw_codegen *p, | ~~~~~~~~~~~~~~~~~~~~^
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6826>
|
 | src/intel/compiler/brw_eu_emit.c (diff) |
Commit
86bab92aa4aac91e8d8730e7344e9bbb44e062ab
by ian.d.romanickintel/compiler: Don't fallback to vec4 when scalar GS compile fails [v2]
v2: Add missing error string handling. Noticed by Jason.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Matt Turner <mattst88@gmail.com> [v1] Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6826>
|
 | src/intel/compiler/brw_vec4_gs_visitor.cpp (diff) |
Commit
d0ce24c8caa14db94e6f6c1f6e1c0da5f58ca1e8
by ian.d.romanickintel/vec4: Remove inline lowering of LRP
Since dd7135d55d5 ("intel/compiler: Use the flrp lowering pass for all stages on Gen4 and Gen5"), it's not possible to get to this function on GPUs that don't have a LRP instruction.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6826>
|
 | src/intel/compiler/brw_vec4_builder.h (diff) |
Commit
60e1d0f028638b2f10f97b38bddbf2a46e578ca2
by ian.d.romanickintel/compiler: Remove INTEL_SCALAR_... env variables
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6826>
|
 | src/intel/compiler/brw_compiler.c (diff) |
Commit
2a49007411bb6617be8409f1adf557a6be4970ac
by ian.d.romanickintel/vec4: Remove all support for Gen8+ [v2]
v2: Restore the gen == 10 hunk in brw_compile_vs (around line 2940). This function is also used for scalar VS compiles. Squash in:
intel/vec4: Reindent after removing Gen8+ support intel/vec4: Silence unused parameter warning in try_immediate_source
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> [v1] Reviewed-by: Matt Turner <mattst88@gmail.com> [v1] Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> [v1] Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6826>
|
 | src/intel/compiler/brw_vec4_gs_visitor.cpp (diff) |
 | src/intel/compiler/brw_vec4_copy_propagation.cpp (diff) |
 | src/intel/compiler/brw_vec4_visitor.cpp (diff) |
 | src/intel/compiler/brw_vec4_surface_builder.cpp (diff) |
 | src/intel/compiler/brw_vec4_nir.cpp (diff) |
 | src/intel/compiler/brw_vec4.cpp (diff) |
 | src/intel/compiler/brw_vec4.h (diff) |
 | src/intel/compiler/brw_vec4_generator.cpp (diff) |
Commit
1d71b1a311239ecbc2dbdd241abcf64a7345dc41
by ian.d.romanickintel/vec4: Remove everything related to VS_OPCODE_SET_SIMD4X2_HEADER_GEN9
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6826>
|
 | src/intel/compiler/brw_ir_performance.cpp (diff) |
 | src/intel/compiler/brw_vec4_generator.cpp (diff) |
 | src/intel/compiler/brw_vec4.cpp (diff) |
 | src/intel/compiler/brw_eu_defines.h (diff) |
 | src/intel/compiler/brw_shader.cpp (diff) |
 | src/intel/compiler/brw_vec4_visitor.cpp (diff) |
Commit
93b8cdfe8bfb87335afc34458dcf1031b934f51a
by vleeanv: Check file descriptor before closing.
Fix defect reported by Coverity Scan.
Argument cannot be negative (NEGATIVE_RETURNS) negative_returns: fd is passed to a parameter that cannot be negative
Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6643>
|
 | src/intel/vulkan/anv_queue.c (diff) |
Commit
70945dd36293329568297d8ac9bc72c91cbca3f5
by eric+margeaco: Initialize mad_info member literal_idx.
Fix defect reported by Coverity Scan.
Uninitialized scalar field (UNINIT_CTOR) uninit_member: Non-static class member literal_idx is not initialized in this constructor nor in any functions that it calls.
Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6832>
|
 | src/amd/compiler/aco_optimizer.cpp (diff) |
Commit
287ef94e242c42f06ef7c2c384f1bbeacb7c2c1c
by eric+margegallium/swr: Remove unreachable code.
pContextMem has already been checked and cannot be NULL.
Fix defect reported by Coverity Scan.
Logically dead code (DEADCODE) dead_error_line: Execution cannot reach this statement: return tsCtx;
Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Jan Zielinski <jan.zielinski@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6857>
|
 | src/gallium/drivers/swr/rasterizer/core/tessellator.h (diff) |
Commit
62ba074ff514acd93bd3d4f14864a67f813ccab4
by eric+margepan/mdg: Fix memory leak on error path.
Fix defect reported by Coverity Scan.
Resource leak (RESOURCE_LEAK) leaked_storage: Variable l going out of scope leaks the storage it points to.
Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6858>
|
 | src/panfrost/midgard/midgard_ra.c (diff) |
Commit
f01656c49590141530054936df051f71af760bd8
by eric+margeCI: Temporarily disable Panfrost T7xx
Due to more work in the on-site lab, we need to take the T7xx machines out of the rotation for a couple of hours.
Signed-off-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6896>
|
 | .gitlab-ci/lava-gitlab-ci.yml (diff) |
Commit
82cf60755720ca4ec227d42f7bcff0cdadc9399e
by eric+margeac/nir: implement nir_intrinsic_{load,store}_global
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5316>
|
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
Commit
10b73e2b5224c977a2ed1391b4f763faa39e4984
by eric+margeac/nir: implement nir_intrinsic_global_atomic_*
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5316>
|
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
Commit
1588644543df39dcceeec4ed640f1ffe9b4fe159
by eric+margeradv: lower deref operations for global memory for both backends
To match ACO.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5316>
|
 | src/amd/compiler/aco_instruction_selection_setup.cpp (diff) |
 | src/amd/vulkan/radv_shader.c (diff) |
Commit
1b4d968106daa18a685d9de9769b5984150ab32b
by eric+margeac/llvm: fix invalid IR if image stores are shrinked using the format
It's not always v4f32 (or v4f16 for 16-bit) when image stores are shrinked using the format.
This fixes a ton of crashes with RADV_DEBUG=checkir,llvm.
Fixes: e4d75c22beb ("nir/opt_shrink_vectors: shrink image stores using the format") Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6882>
|
 | src/amd/llvm/ac_llvm_build.c (diff) |
Commit
89e3c3a826178b738d25f43d7e5bef71e6e46e49
by eric+margemesa: bptc fixes for decompress rgba_unorm and rgb_float
Save bit_offset between iterations fixes for piglit: * LIBGL_ALWAYS_SOFTWARE=true GALLIUM_DRIVER=softpipe piglit/bin/bptc-float-modes * LIBGL_ALWAYS_SOFTWARE=true GALLIUM_DRIVER=llvmpipe piglit/bin/bptc-float-modes
Memset to zero in reserved mode for rgba_unorm fixes for VK-GL-CTS with libvulkan_val: * dEQP-VK.texture.compressed.bc7_unorm_block_2d_pot * dEQP-VK.texture.compressed.bc7_srgb_block_2d_pot * dEQP-VK.texture.compressed.bc7_unorm_block_2d_npot * dEQP-VK.texture.compressed.bc7_srgb_block_2d_npot
Signed-off-by: Denis Pauk <pauk.denis@gmail.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6809>
|
 | src/mesa/main/texcompress_bptc_tmp.h (diff) |
Commit
c420db1665bad14bf3542733a454564523284263
by eric+margepanfrost: Adjust quirks for bifrost v6
The G72, which is a bifrost v6, supports fast operations. The selection should probably be done on a per-GPU basis instead of forcing this quirk for all v6 GPUs.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6885>
|
 | src/panfrost/bifrost/bi_quirks.h (diff) |
Commit
fefb3e9b7008e92c456f47bb1ceb58d84b24e1d3
by eric+margepanfrost: Add preliminary support for Mali G72
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6885>
|
 | src/panfrost/lib/pan_texture.c (diff) |
 | src/gallium/drivers/panfrost/pan_context.c (diff) |
 | src/gallium/drivers/panfrost/pan_cmdstream.c (diff) |
 | src/gallium/drivers/panfrost/pan_screen.c (diff) |
 | src/panfrost/lib/pan_props.c (diff) |
 | src/panfrost/lib/pan_texture.h (diff) |
 | src/panfrost/include/panfrost-quirks.h (diff) |
Commit
cff7de4bb597e944c9248b55a74e0c7739320079
by eric+margekmsro: Add mediatek entry point
Add an entry for the mediatek modesetting driver.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6885>
|
 | src/gallium/targets/dri/meson.build (diff) |
 | src/gallium/targets/dri/target.c (diff) |
Commit
af9b073d5f72a26312b3e196f34f195d9c49e6aa
by eric+margedocs: drop outdated gallium-docs comment
The separate readthedocs documentation is quite pointless these days, as it's been moved to docs.mesa3d.org, where all other documentation already is. There's nothing special about this documentation any longer.
Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6893>
|
 | docs/sourcedocs.rst (diff) |
|
 | docs/versions.rst (diff) |
|
 | docs/versions.rst (diff) |
 | docs/gallium/cso/sampler.rst (diff) |
Commit
915d4e280687f7dbeae9075c07412f8b02a68c9f
by eric+margedocs: stabilisation -> stabilization
We generally prefer US English in the docs over UK English.
Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6894>
|
 | docs/releasing.rst (diff) |
Commit
40cb54270cd749585b0089a95e528288a14ec907
by eric+margedocs: flavours -> flavors
We generally prefer US English over UK English in the docs.
Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6894>
|
 | docs/gallium/context.rst (diff) |
|
 | docs/ci/docker.rst (diff) |
 | docs/ci/index.rst (diff) |
|
 | docs/ci/bare-metal.rst (diff) |
 | docs/ci/index.rst (diff) |
 | docs/ci/LAVA.rst (diff) |
 | docs/ci/docker.rst (diff) |
|
 | docs/index.rst (diff) |
 | docs/vmware-guest.rst (diff) |
 | docs/codingstyle.rst (diff) |
 | docs/sourcetree.rst (diff) |
 | docs/viewperf.rst (diff) |
 | docs/osmesa.rst (diff) |
Commit
7685c37bf47104497d70c4580abb9e050ea8100f
by eric+margest/mesa: use roundf instead of floorf for lod-bias rounding
There's no good reason not to use a symmetric rounding mode here. This fixes the following GL CTS case for me:
GTF-GL33.gtf21.GL3Tests.texture_lod_bias.texture_lod_bias_all
Fixes: 132b69c4edb ("st/mesa: round lod_bias to a multiple of 1/256") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6892>
|
 | src/mesa/state_tracker/st_atom_sampler.c (diff) |
Commit
a0e35c7562e1927cd92d4bf82ade8843aeac5dff
by eric+margenir/lower_io: change nir_io_add_const_offset_to_base to use bitfield modes
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6890>
|
 | src/compiler/nir/nir_lower_io.c (diff) |
 | src/compiler/nir/nir.h (diff) |
Commit
1a19fae8680467e89dfea25bef39b41b21908dc3
by eric+margeradeonsi: call nir_io_add_const_offset_to_base only once per shader
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6890>
|
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
2c08404f38857de55abd98da077b8edbe6197059
by eric+margedocs: add INTEL_SHADER_ASM_READ_PATH description
It was implemented in https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/955
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6895>
|
 | docs/envvars.rst (diff) |
Commit
778fe02f3b9fda1d02e9ddc77201f867a8e6527b
by eric+margeradv/llvm: call nir_lower_io_to_vector with FS to fix array tests
Fixes dEQP-VK.glsl.440.linkage.varying.component.frag_out.*.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6883>
|
 | src/amd/vulkan/radv_shader.c (diff) |
Commit
a21e1e615cd5a9bce4391914fe0d4cec7acc3552
by eric+margegallium/util: set right dst-dimensions
This should have been the destination surface size, not the dimensions of the source box. These were the same in the test-case I used while developing this, but this matters for the GTF framebuffer-blit functional CTS tests.
Fixes: e8a40715a8b ("gallium/util: add blitter-support for stencil-fallback") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6898>
|
 | src/gallium/auxiliary/util/u_blitter.c (diff) |
Commit
69654f0918f0fb46466b81296e4030a9a63c6e4e
by eric+margegallium/util: fix texture-coordinates for stencil-fallback
Set up texture coordinates for the stencil-fallback blit code. This worked in the orignal NIR code, but accidentally broke when rewriting to use TGSI, and my test-case had a constant colored stencil buffer.
Fixes: e8a40715a8b ("gallium/util: add blitter-support for stencil-fallback") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6898>
|
 | src/gallium/auxiliary/util/u_blitter.c (diff) |
Commit
b4c07a8a87d06f2c347f204cac9fe708428e272d
by eric+margegallium/util: allow scaling blits for stencil-fallback
We also need to be able to scale the stencil-blits, so let's pass the full destination box instead of just the position.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6898>
|
 | src/gallium/auxiliary/util/u_blitter.h (diff) |
 | src/gallium/auxiliary/util/u_blitter.c (diff) |
Commit
ffe946d7e82ca95a59851ea65fc725f0f1ebf85d
by eric+margenir: Add nir_lower_multiview pass
Taken mostly directly from the anv pass. A few anv-specific things that I could leave in anv aren't included. Specifically on turnip we don't need to set gl_Layer to 0, and we can handle the case where the FS reads gl_ViewIndex, so that check is moved into anv.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6514>
|
 | src/compiler/Makefile.sources (diff) |
 | src/compiler/nir/nir.h (diff) |
 | src/compiler/nir/nir_lower_multiview.c |
 | src/compiler/nir/meson.build (diff) |
|
 | src/intel/vulkan/anv_nir_lower_multiview.c (diff) |
Commit
df955ce6b6ac6baa7ae4df21fe3267f0e4bfc7be
by eric+margenir: Count i/o slots correctly for per-view variables
This function wasn't counting driver slots correctly, resulting in incorrect driver_location's and input_count. It seems intel doesn't use this yet.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6514>
|
 | src/compiler/nir/nir_linking_helpers.c (diff) |
Commit
5a88db682e08b5e58b40653872569f5b5d77777d
by eric+margenir/lower_io_arrays: Fix xfb_offset bug
I noticed this once I started gathering xfb_info after nir_lower_io_arrays_to_elements_no_indirect.
Fixes: b2bbd978d0b ("nir: fix lowering arrays to elements for XFB outputs") Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6514>
|
 | src/compiler/nir/nir_lower_io_arrays_to_elements.c (diff) |
|
 | src/compiler/nir/nir_print.c (diff) |
 | src/compiler/nir/nir.h (diff) |
 | src/compiler/nir/nir_lower_io.c (diff) |
Commit
51e2b3103971ff4ed83f5553e5de626b220355d0
by eric+margenir: Handle per-view io in nir_io_add_const_offset_to_base()
This isn't strictly necessary for freedreno, since we aren't using it yet, but I wanted to avoid any problems if we do. If we wanted to handle this "properly", and handle matrix and array per-view variables, we'd probably want to encode the "view stride" (number of views per user location) and base view in the intrinsic, but for now we just don't do any offsetting and assume the indirect offset is the view.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6514>
|
 | src/compiler/nir/nir_lower_io.c (diff) |
|
 | .gitlab-ci/lava-gitlab-ci.yml (diff) |
Commit
d4d5382963f1e120e579ba48f9787a022a6420c2
by eric+margepanfrost: Add support for rbg16 formats
Fixes: 171e94fe629 ("mesa/st: enable EXT_color_buffer_half_float when formats supported") Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6887>
|
 | .gitlab-ci/deqp-panfrost-t860-fails.txt (diff) |
 | src/gallium/drivers/panfrost/pan_mfbd.c (diff) |
Commit
560cff81f58ee40043a1e2135ee7690c6e470515
by eric+margeturnip: remove unused cmd_buffer/device arguments in descriptor sets
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6755>
|
 | src/freedreno/vulkan/tu_descriptor_set.c (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
Commit
992d24794da28d9f0f97c87c3127957bfa2f5b82
by eric+margeturnip: delete unused/broken pipeline layout hashing code
Note: immutable samplers hash was wrong since we have an array of tu_sampler and not 4 dwords like radv.
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6755>
|
 | src/freedreno/vulkan/tu_descriptor_set.c (diff) |
 | src/freedreno/vulkan/tu_descriptor_set.h (diff) |
Commit
6d4f33e469b301b2fc4f398f62c81ef66f9150be
by eric+margeturnip: initial implementation of VK_KHR_push_descriptor
Add missing descriptor sets code for push descriptors, and a simple initial implementation to enable the extension and pass dEQP tests.
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6755>
|
 | src/freedreno/vulkan/tu_extensions.py (diff) |
 | src/freedreno/vulkan/tu_cmd_buffer.c (diff) |
 | .gitlab-ci/deqp-freedreno-a630-flakes.txt (diff) |
 | src/freedreno/vulkan/tu_descriptor_set.h (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
 | src/freedreno/vulkan/tu_descriptor_set.c (diff) |
|
 | src/gallium/include/pipe/p_defines.h (diff) |
 | src/gallium/auxiliary/util/u_screen.c (diff) |
|
 | src/compiler/glsl/glsl_parser_extras.cpp (diff) |
 | src/mesa/main/extensions_table.h (diff) |
 | src/mesa/main/mtypes.h (diff) |
 | src/compiler/glsl/glsl_parser_extras.h (diff) |
 | src/compiler/glsl/lower_ubo_reference.cpp (diff) |
 | src/compiler/glsl/builtin_functions.cpp (diff) |
 | src/compiler/glsl/glsl_to_nir.cpp (diff) |
 | src/mesa/state_tracker/st_extensions.c (diff) |
 | src/compiler/glsl/lower_shared_reference.cpp (diff) |
|
 | src/gallium/drivers/radeonsi/si_get.c (diff) |
 | docs/relnotes/new_features.txt (diff) |
Commit
85074ec5f6c57a8d1d391e86032285721ae773dd
by eric+margeradv/aco: Set I/O variable locations outside ACO.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Acked-by: Daniel Schürmann <daniel@schuermann.dev> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6865>
|
 | src/amd/compiler/aco_instruction_selection_setup.cpp (diff) |
 | src/amd/vulkan/radv_pipeline.c (diff) |
Commit
4dae9e53f6afa9c02e6dd5bfe4d522b647d93b98
by eric+margeradv: call nir_io_add_const_offset_to_base for FS outputs
The store_output of RADV/LLVM expects the const offset to be 0.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Acked-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6865>
|
 | src/amd/vulkan/radv_shader.c (diff) |
Commit
291cfb1e41513008a5be08be95399373a7de206d
by eric+margeradv: move lowering of FS outputs outside of ACO
This enables lowering of FS outputs for RADV/LLVM.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Acked-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6865>
|
 | src/amd/vulkan/radv_shader.c (diff) |
 | src/amd/compiler/aco_instruction_selection_setup.cpp (diff) |
Commit
a3363c348dcd968f2d3e413099a4d28fcda047eb
by eric+margegallium: Make pipe_viewport_state swizzle_x/y/z/w bit-fields 8 bits wide
Previously there were 20 padding bits after them, which would be left uninitialized and preserved when writing to the swizzle members. This could result in two equal viewport states spuriously being considered different (because memcmp compared the padding bits as well).
Noticed while looking for something else with valgrind:
==801624== Conditional jump or move depends on uninitialised value(s) ==801624== at 0x10B86259: cso_set_viewport (cso_context.c:739) ==801624== by 0x10B862C7: cso_set_viewport_dims (cso_context.c:764) ==801624== by 0x1057E3A1: clear_with_quad (st_cb_clear.c:335) ==801624== by 0x1057E3A1: st_Clear (st_cb_clear.c:545) ==801624== [...] ==801624== ==801624== Conditional jump or move depends on uninitialised value(s) ==801624== at 0x10B885DE: cso_restore_viewport (cso_context.c:777) ==801624== by 0x10B885DE: cso_restore_state (cso_context.c:1710) ==801624== by 0x1057E4CB: clear_with_quad (st_cb_clear.c:364) ==801624== by 0x1057E4CB: st_Clear (st_cb_clear.c:545) ==801624== [...]
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6867>
|
 | src/gallium/include/pipe/p_state.h (diff) |
Commit
67ac16611bd31a84e9dd6e54ea4747ab7aad717a
by eric+margetu: Write multiview control registers in binning pass
Multiview is never used with binning, but we still need to make sure to disable it in the binning pass.
Fixes: c0c7dbd ("tu: Implement multiview pipeline state") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6515>
|
 | src/freedreno/vulkan/tu_pipeline.c (diff) |
Commit
41a5a2185827257820af37ee8752a839d6f2d519
by eric+margetu: Refactor shader compilation flow
In order to do cross-stage linking, we'll need to split out SPIR-V->NIR and NIR finalization, so that we can do a round of linking in between. The multiview lowering pass also assumes that it sits between two optimization loops, which in anv are the pre-linking optimizations and post-linking finalization.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6515>
|
 | src/freedreno/vulkan/tu_pipeline.c (diff) |
 | src/freedreno/vulkan/tu_shader.c (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
Commit
6982e8510b56991532533bf7da70344bdbb695b9
by eric+margeir3, tu: Run optimization loop twice
This call to ir3_optimize_nir() mirrors what st/mesa does for us in Gallium, and will be necessary for cross-stage linking and the multiview lowering.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6515>
|
 | src/freedreno/ir3/ir3_nir.h (diff) |
 | src/freedreno/ir3/ir3_nir.c (diff) |
 | src/freedreno/vulkan/tu_shader.c (diff) |
|
 | src/freedreno/ir3/ir3_shader.h (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
 | src/freedreno/vulkan/tu_pipeline.c (diff) |
 | src/freedreno/ir3/ir3_compiler_nir.c (diff) |
|
 | src/freedreno/vulkan/tu_nir_lower_multiview.c (diff) |
 | src/freedreno/vulkan/tu_device.c (diff) |
 | src/freedreno/vulkan/tu_shader.c (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
|
 | src/gallium/auxiliary/vl/vl_mpeg12_decoder.c (diff) |
 | src/gallium/auxiliary/vl/vl_vertex_buffers.c (diff) |
Commit
2584d48b2cf13ea50b4e6177f32bacf0c7027e79
by eric+margegallium/vl: add chroma_format arg to vl_video_buffer functions
vl_mpeg12_decoder needs to override the chroma_format value to get the correct size calculated (chroma_format is used by vl_video_buffer_adjust_size).
I'm not sure why it's needed, but this is needed to get correct mpeg decode.
Fixes: 24f2b0a8560 ("gallium/video: remove pipe_video_buffer.chroma_format") Acked-by: Leo Liu <leo.liu@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6817>
|
 | src/gallium/auxiliary/vl/vl_stubs.c (diff) |
 | src/gallium/auxiliary/vl/vl_video_buffer.h (diff) |
 | src/gallium/drivers/r600/r600_uvd.c (diff) |
 | src/gallium/auxiliary/vl/vl_mpeg12_decoder.c (diff) |
 | src/gallium/auxiliary/vl/vl_video_buffer.c (diff) |
|
 | docs/envvars.rst (diff) |
Commit
efaea653b5766427701817ab06c319902a148ee9
by eric+margeintel: Add support for i945g to intel_stub_gpu.
I wanted to check the impact of nir-to-tgsi on the i915g driver, but I don't have an i915 set up. Similarly, for driconf refactoring I needed to make sure that classic i915_dri.so still loaded.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6868>
|
 | src/intel/tools/intel_noop_drm_shim.c (diff) |
 | src/intel/dev/gen_device_info.c (diff) |
Commit
aee1c08c06567a7c83f97f3e736dec4bb0008403
by eric+margeci/deqp-runner: Allow overriding width/height/config
This will allow adding multi-sample caselists, and jobs with larger surface size.
Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6553>
|
 | .gitlab-ci/deqp-runner.sh (diff) |
 | .gitlab-ci/bare-metal/rootfs-setup.sh (diff) |
|
 | .gitlab-ci/build-deqp.sh (diff) |
 | .gitlab-ci.yml (diff) |
Commit
1b39d74c6823f451b7ed39d9b29d7cda607527c8
by eric+margeci: Enable remaining (non-rotate) mustpass CTS tests
The gles3 and gles31 multisample and 565-no-depth-no-stencil caselists are also mustpass. And they don't add a significant number of extra test cases.
The remaining mustpass caselists all involve rotation, which is not currently supported in the surfaceless deqp build.
Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6553>
|
 | .gitlab-ci/deqp-freedreno-a630-565nozs-fails.txt |
 | .gitlab-ci/deqp-freedreno-a630-multisample-fails.txt |
 | .gitlab-ci.yml (diff) |
|
 | src/amd/vulkan/radv_cmd_buffer.c (diff) |
Commit
e31381ac2609ef06dfa5a230c38e7044009f5526
by eric+margezink: combine all surface layout-setting for src/dst into util function
we do a lot of src/dst layout-setting, so ensure that we use the same code everywhere to avoid cases where src==dst and we aren't setting GENERAL layout as we should
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6922>
|
 | src/gallium/drivers/zink/zink_context.c (diff) |
 | src/gallium/drivers/zink/zink_resource.h (diff) |
 | src/gallium/drivers/zink/zink_blit.c (diff) |
 | src/gallium/drivers/zink/zink_resource.c (diff) |
Commit
6a20c630b93b1519c71a0a90185aebe30054be9d
by eric+margezink: unify all occurrences of waiting on a fence
this was duplicated in a few places
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6922>
|
 | src/gallium/drivers/zink/zink_context.c (diff) |
 | src/gallium/drivers/zink/zink_context.h (diff) |
 | src/gallium/drivers/zink/zink_query.c (diff) |
 | src/gallium/drivers/zink/zink_resource.c (diff) |
Commit
69a3ef6511255d6652c74439efa2162d14340cc7
by eric+margefreedreno/drm: drop bo's dev reference
This is a bit over-paranoid, and can cause drm device fd leaks if there is a bo leak somewhere. Which is kind of a worse outcome.
This "fixes" a fd leak seen in:
dEQP-EGL.functional.query_context.get_current_display.* dEQP-EGL.functional.query_context.get_current_context.* dEQP-EGL.functional.query_context.get_current_display.*
(Still tracking down the root leak)
Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6900>
|
 | src/freedreno/drm/freedreno_bo.c (diff) |
 | src/freedreno/drm/freedreno_bo_cache.c (diff) |
|
 | src/gallium/drivers/freedreno/a4xx/fd4_context.c (diff) |
 | src/gallium/drivers/freedreno/a6xx/fd6_context.c (diff) |
 | src/gallium/drivers/freedreno/a5xx/fd5_context.c (diff) |
 | src/gallium/drivers/freedreno/a3xx/fd3_context.c (diff) |
|
 | src/gallium/drivers/freedreno/a6xx/fd6_zsa.h (diff) |
 | src/gallium/drivers/freedreno/a6xx/fd6_context.c (diff) |
 | src/gallium/drivers/freedreno/a6xx/fd6_zsa.c (diff) |
Commit
27c8d976577effe89c336181db7d140ddbb5cfa8
by eric+margefreedreno/drm: Also clean ring_cache
We also need to release all the entries from the ring_cache when tearing down the dev.
Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6900>
|
 | src/freedreno/drm/freedreno_device.c (diff) |
|
 | src/freedreno/registers/adreno/a5xx.xml (diff) |
 | src/freedreno/registers/adreno/adreno_pm4.xml (diff) |
 | src/freedreno/.gitlab-ci/reference/afuc_test.asm (diff) |
|
 | src/gallium/drivers/freedreno/freedreno_resource.c (diff) |
Commit
7683e2756195c01e8786323d9b9329726d0510b2
by eric+marger600/sfn: Fix enabling the right interpolator for inerpolate_at_sample
Fixes: 73c5f451916 r600/sfn: Fix interpolate at sample
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6925>
|
 | src/gallium/drivers/r600/sfn/sfn_shader_fragment.cpp (diff) |
Commit
48edb98a7ef0366629aebc0a7248b74b50c1ff50
by eric+marger600/sfn: Fix IDX register ID
Fixes: 9a6b11a7330 r600/sfn: Fix indirect const buffer access
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6925>
|
 | src/gallium/drivers/r600/sfn/sfn_ir_to_assembly.cpp (diff) |
Commit
02245e38fcf3664247738219f198f064d3b625b5
by eric+marger600/sfn: Add support for more barrier instructions
These barriers should probably be global, but currently we only issue a shared barrir (i.e. for only one wave front).
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6925>
|
 | src/gallium/drivers/r600/sfn/sfn_shader_base.cpp (diff) |
Commit
89a1a3e9d60b98dca132c12b0952e0201d28bfc6
by eric+marger600/sfn: extend life range of all variables by one
This is a strange fix for some gles 3.1 tests with atomics. Maybed the register holding the atomic add value can't be re-used in the first instruction after an GDS instruction.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6925>
|
 | src/gallium/drivers/r600/sfn/sfn_liverange.cpp (diff) |
Commit
d12cdc9374dc30fa032ea309cad8e921d92ad0e5
by eric+margegallivm: fix pow(0, y) to be 0
The log2(0) was producing bad results.
Fixes: piglit pow tests on llvmpipe.
Reviewed-by: Roland Scheidegger <sroland@vmware.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6907>
|
 | .gitlab-ci/piglit/quick_shader.txt (diff) |
 | .gitlab-ci/traces-llvmpipe.yml (diff) |
 | src/gallium/auxiliary/gallivm/lp_bld_arit.c (diff) |
|
 | src/freedreno/vulkan/tu_device.c (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
Commit
2a3f6e0267f1be7c0290eb0c14e5ca6f1c387cab
by eric+margeturnip: always create permanent syncobj for semaphore
This allows non-exported semaphores to behave correctly instead of being ignored in QueueSubmit().
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6719>
|
 | src/freedreno/vulkan/tu_drm.c (diff) |
Commit
1dfb5a93d2663128850c2280e1feb808a5960b4f
by eric+margeturnip: set MSM_SUBMIT_SYNCOBJ_RESET for submit pWaitSemaphores
From VK spec:
"the act of waiting for a binary semaphore also unsignals that semaphore"
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6719>
|
 | src/freedreno/vulkan/tu_drm.c (diff) |
Commit
fb76af24a228213e37d00b5467b1871281969fea
by eric+margeturnip: semaphores simplification (only syncobj semaphores supported)
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6719>
|
 | src/freedreno/vulkan/tu_private.h (diff) |
 | src/freedreno/vulkan/tu_drm.c (diff) |
Commit
8343c32f5af33d773df703b845562385c5126758
by eric+margeturnip: rework GetSemaphoreFdKHR
Fixes: - permanent payload not being restored for the OPAQUE_FD case - incorrectly resetting the permanent payload in SYNC_FD case
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6719>
|
 | src/freedreno/vulkan/tu_drm.c (diff) |
Commit
c4d5010c54d83f102f07a98575189a5f1429b6a1
by eric+margeturnip: rework ImportSemaphoreFdKHR
The behavior of OPAQUE_FD should be unchanged.
SYNC_FD case is reworked to be more like what anv does: a new temporary syncobj is always created, with the CREATE_SIGNALED flag if necessary.
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6719>
|
 | src/freedreno/vulkan/tu_drm.c (diff) |
|
 | src/freedreno/vulkan/tu_drm.c (diff) |
|
 | src/freedreno/vulkan/tu_extensions.py (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
 | src/freedreno/vulkan/tu_drm.c (diff) |
 | src/freedreno/vulkan/tu_wsi_display.c (diff) |
Commit
728061b96891290c02297f3097d790221f624a8d
by eric+margeturnip: signal fence and semaphore in AcquireNextImage2KHR
As a result of doing semaphores correctly, this is needed for things to work correctly.
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6719>
|
 | src/freedreno/vulkan/tu_wsi.c (diff) |
 | src/freedreno/vulkan/tu_drm.c (diff) |
 | src/freedreno/vulkan/tu_kgsl.c (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
Commit
28911360507312dd6176c1c53d147846a9849e1a
by airliedgallivm: fix 64-bit CL intrinsics.
This fixes a bunch of bad casts in piglit tests
Reviewed-by: Roland Scheidegger <sroland@vmware.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6928>
|
 | src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c (diff) |
Commit
5d4502c085521ba149048c958f56ee4a62b8484c
by airliedgallivm/nir: fix up non 32-bit load stores
This fixes a bunch of opencl tests.
Reviewed-by: Roland Scheidegger <sroland@vmware.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6928>
|
 | src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c (diff) |
|
 | src/gallium/auxiliary/gallivm/lp_bld_nir.c (diff) |
Commit
b0504ed682f7df16ec108016b09ad6ede1c290a4
by airliedllvmpipe: use an alternate env var to enable clover.
This can be used outside debug contexts.
Reviewed-by: Roland Scheidegger <sroland@vmware.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6928>
|
 | src/gallium/drivers/llvmpipe/lp_screen.h (diff) |
 | src/gallium/drivers/llvmpipe/lp_screen.c (diff) |
 | src/gallium/drivers/llvmpipe/lp_debug.h (diff) |
Commit
7a2b4ce22e40471b45c5506f970bedac678243fe
by eric+margenir: Allow creating variables with nir_var_mem_push_const.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5275>
|
 | src/compiler/nir/nir_validate.c (diff) |
 | src/compiler/nir/nir.c (diff) |
 | src/compiler/nir/nir_print.c (diff) |
|
 | src/compiler/nir/nir_lower_io.c (diff) |
 | src/compiler/nir/nir.h (diff) |
Commit
d3fa7451a6651ea78bd4d1ec2f63e052e7608531
by eric+margeanv,radv,tu,val: Call nir_lower_io for push constants
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5275>
|
 | src/amd/vulkan/radv_shader.c (diff) |
 | src/intel/vulkan/anv_pipeline.c (diff) |
 | src/freedreno/vulkan/tu_shader.c (diff) |
 | src/gallium/frontends/vallium/val_pipeline.c (diff) |
|
 | src/compiler/spirv/vtn_variables.c (diff) |
 | src/compiler/spirv/spirv_to_nir.c (diff) |
Commit
1cadbe514138e898d4b0cd3f3d5ba35c20fac87b
by eric+margevallium: Stop using lower_ubo_ssbo_access_to_offsets
This legacy path needs to die. Drivers shouldn't be using it anymore. While we're here, we also implement the resource_reindex intrinsic which doesn't come up in most direct-access cases but can depending on how the OpAccessChains are structured. It comes up all the time in the variable pointers world.
Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5275>
|
 | src/gallium/frontends/vallium/val_pipeline.c (diff) |
 | src/gallium/frontends/vallium/val_lower_vulkan_resource.c (diff) |
|
 | src/compiler/spirv/spirv_to_nir.c (diff) |
 | src/compiler/spirv/vtn_private.h (diff) |
 | src/gallium/drivers/freedreno/ir3/ir3_cmdline.c (diff) |
 | src/compiler/spirv/nir_spirv.h (diff) |
 | src/freedreno/vulkan/tu_shader.c (diff) |
 | src/compiler/spirv/vtn_variables.c (diff) |
|
 | docs/versions.rst (diff) |
|
 | docs/versions.rst (diff) |
|
 | docs/ci/bare-metal.rst (diff) |
Commit
a1904c96f3b4b14dc6739ad40da4648ccb5b0b66
by eric+margedocs: bpp -> BPP
While we're at it, make sure we always have a space between the number and "BPP", for easier reading.
Reviewed-by: Eric Engestrom <eric@engestrom.ch> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6915>
|
 | docs/versions.rst (diff) |
 | docs/envvars.rst (diff) |
|
 | docs/meson.rst (diff) |
|
 | docs/meson.rst (diff) |
|
 | docs/install.rst (diff) |
 | docs/meson.rst (diff) |
 | docs/debugging.rst (diff) |
|
 | docs/meson.rst (diff) |
|
 | docs/install.rst (diff) |
 | docs/meson.rst (diff) |
|
 | docs/meson.rst (diff) |
 | docs/install.rst (diff) |
|
 | docs/meson.rst (diff) |
|
 | docs/meson.rst (diff) |
|
 | docs/meson.rst (diff) |
|
 | docs/meson.rst (diff) |
|
 | docs/meson.rst (diff) |
|
 | docs/install.rst (diff) |
|
 | docs/install.rst (diff) |
 | docs/meson.rst (diff) |
|
 | docs/install.rst (diff) |
 | docs/meson.rst (diff) |
|
 | docs/systems.rst (diff) |
|
 | docs/meson.rst (diff) |
|
 | docs/ci/index.rst (diff) |
|
 | docs/ci/index.rst (diff) |
|
 | docs/lists.rst (diff) |
 | docs/vmware-guest.rst (diff) |
 | docs/ci/index.rst (diff) |
|
 | docs/releasing.rst (diff) |
 | docs/ci/index.rst (diff) |
|
 | docs/helpwanted.rst (diff) |
 | docs/submittingpatches.rst (diff) |
 | docs/ci/bare-metal.rst (diff) |
 | docs/download.rst (diff) |
 | docs/thanks.rst (diff) |
 | docs/vmware-guest.rst (diff) |
 | docs/ci/index.rst (diff) |
 | docs/systems.rst (diff) |
 | docs/lists.rst (diff) |
 | docs/releasing.rst (diff) |
 | docs/repository.rst (diff) |
 | docs/sourcedocs.rst (diff) |
|
 | docs/submittingpatches.rst (diff) |
|
 | docs/debugging.rst (diff) |
|
 | docs/vmware-guest.rst (diff) |
|
 | docs/systems.rst (diff) |
|
 | docs/ci/index.rst (diff) |
|
 | docs/envvars.rst (diff) |
Commit
636f770233543c00c319895201498c57eece6774
by eric+margebin/gen_release_notes.py: escape special rST characters
Signed-off-by: Eric Engestrom <eric@engestrom.ch> Reviewed-by: Dylan Baker <dylan@pnwbakers.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6869>
|
 | bin/gen_release_notes.py (diff) |
Commit
55e2b3424decf9f0240bb6fe0fd521e775d28d66
by eric+margeradeonsi: Fix imports with displayable DCC.
Otherwise we reset the displayable DCC on import.
Fixes: c6c1fa9a263 "radeonsi: Put retile map in separate buffers." Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3577 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6918>
|
 | src/gallium/drivers/radeonsi/si_texture.c (diff) |
Commit
b2ede6280c0a6030efb0bf2005b018dbacfbf4f1
by eric+margeintel/nir: Use nir control flow helpers
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Matt Turner <mattst88@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6866>
|
 | src/intel/blorp/blorp_blit.c (diff) |
 | src/intel/compiler/brw_nir_tcs_workarounds.c (diff) |
Commit
f504eb683d8596326015d18b6fcdfccc8a4ad32e
by eric+margeradv: Use nir control flow insertion helpers
v2 (Jason Ekstrand): - Rebased and tweaked a few cases - Use the helpers in build_timestamp_query_shader
Reviewed-by: Matt Turner <mattst88@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6866>
|
 | src/amd/vulkan/radv_query.c (diff) |
 | src/amd/vulkan/radv_meta.c (diff) |
Commit
f103bded0b5b7f1860a1d0be92d19bb248d29fd4
by eric+margettn: Use nir control flow insertion helpers
As a side effect, we can delete the whole control flow stack thing.
v2 (Jason Ekstrand): - Drop the ttn_if helper and just inline it in the two uses
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Matt Turner <mattst88@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6866>
|
 | src/gallium/auxiliary/nir/tgsi_to_nir.c (diff) |
Commit
c6f871b62e21343263a7a4c1fd945269e87fd7ee
by eric+margenir/lower_returns: Use nir control flow insertion helpers
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Matt Turner <mattst88@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6866>
|
 | src/compiler/nir/nir_lower_returns.c (diff) |
Commit
656e428ff4e027d134027df73a0fe13e587011a8
by eric+margenir/opt_if: Remove open-coded nir_ssa_def_rewrite_uses()
So that we don't have to change these two places later.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Matt Turner <mattst88@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6866>
|
 | src/compiler/nir/nir_opt_if.c (diff) |
Commit
7f0cd6f1539ff4a98d1d084116834073f20c515d
by eric+margenir/opt_if: Use early returns in opt_if_merge()
We would've had to add yet another level of indentation, or duplicated finding the if conditions in the next commit. Refactor this function to use early returns like our other optimizations, so that this isn't an issue.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Matt Turner <mattst88@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6866>
|
 | src/compiler/nir/nir_opt_if.c (diff) |
Commit
9a48ed84ecd166d57fb8018401eb5491d8f80bb1
by eric+margenir/copy_propagate: Copy-prop into jump conditions
Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Matt Turner <mattst88@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6866>
|
 | src/compiler/nir/nir_opt_copy_propagate.c (diff) |
|
 | src/compiler/nir/nir_clone.c (diff) |
 | src/compiler/nir/nir_serialize.c (diff) |
Commit
7dbb1f7462433940951ce6c3fa22f6368aeafd50
by eric+margenir/cf: Better handle intra-block splits
In the case where end was a instruction-based cursor, we would mix up our blocks and end up with block_begin pointing after the second split. This causes a segfault as the cf_node list walk at the end of the function never terminates properly. There's also a possibility of mix-up if begin is an instruction-based cursor which was found by inspection.
Fixes: fc7f2d2364a9 "nir/cf: add new control modification API's" Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Acked-by: Matt Turner <mattst88@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6866>
|
 | src/compiler/nir/nir_control_flow.c (diff) |
Commit
87900afe5bbe90c5f3ad0921b28ae1c889029ada
by eric+margeutil: implement f16c - fast half<->float conversions
This also happens to fix bptc-float-modes on llvmpipe.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6774>
|
 | src/util/softfloat.c (diff) |
 | src/util/softfloat.h (diff) |
 | meson.build (diff) |
 | src/util/half_float.h (diff) |
 | .gitlab-ci/piglit/quick_gl.txt (diff) |
 | src/gallium/tests/unit/u_half_test.c (diff) |
 | src/util/half_float.c (diff) |
Commit
5af81393e419eaf086e4de2a1d149af78cd1f54d
by eric+margeutil: move util_half_to_float code into _mesa_half_to_float_slow
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6774>
|
 | src/util/half_float.c (diff) |
 | src/gallium/auxiliary/util/u_half.h (diff) |
Commit
2b6a17234376817e75d1f81edf5bd1b28eefb374
by eric+margeutil: remove util_float_to_half and util_half_to_float wrappers
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6774>
|
 | src/gallium/drivers/lima/ir/pp/codegen.c (diff) |
 | src/freedreno/rnn/headergen2.c (diff) |
 | src/gallium/drivers/freedreno/a5xx/fd5_emit.c (diff) |
 | src/gallium/frontends/nine/vertexshader9.h (diff) |
 | src/freedreno/registers/gen_header.py (diff) |
 | src/gallium/drivers/lima/lima_draw.c (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_blend.c (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_zsa.c (diff) |
 | src/util/format/u_format_pack.py (diff) |
 | src/gallium/tests/unit/translate_test.c (diff) |
 | src/gallium/auxiliary/tgsi/tgsi_exec.c (diff) |
 | src/gallium/tests/unit/u_half_test.c (diff) |
 | src/gallium/drivers/r300/r300_state.c (diff) |
 | src/gallium/auxiliary/gallivm/lp_bld_conv.c (diff) |
 | src/gallium/drivers/v3d/v3dx_emit.c (diff) |
 | src/gallium/drivers/lima/ir/pp/disasm.c (diff) |
 | src/gallium/auxiliary/gallivm/lp_bld_const.c (diff) |
 | src/gallium/drivers/v3d/v3dx_state.c (diff) |
 | src/gallium/drivers/freedreno/freedreno_texture.c (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_disasm.c (diff) |
 | src/gallium/auxiliary/util/u_half.h (diff) |
 | src/mesa/vbo/vbo_attrib_tmp.h (diff) |
 | src/gallium/drivers/freedreno/a6xx/fd6_emit.c (diff) |
 | src/gallium/auxiliary/translate/translate_generic.c (diff) |
 | src/gallium/drivers/nouveau/nv30/nv30_state_validate.c (diff) |
 | src/freedreno/vulkan/tu_clear_blit.c (diff) |
Commit
7a1deb16f8af4e0ae4ed64511cbfcc606087f0ee
by eric+margegallium/util: remove redundant util_float_to_half_rtz
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6774>
|
 | src/util/format/u_format_pack.py (diff) |
 | src/util/format/u_format_tests.c (diff) |
 | src/gallium/auxiliary/util/u_half.h (diff) |
 | src/amd/vulkan/radv_formats.c (diff) |
|
 | src/freedreno/perfcntrs/freedreno_perfcntr.h (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_zsa.c (diff) |
 | src/freedreno/perfcntrs/fd6_perfcntr.c (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_disasm.c (diff) |
 | src/gallium/drivers/freedreno/freedreno_util.h (diff) |
 | src/gallium/tests/unit/translate_test.c (diff) |
 | src/gallium/drivers/lima/lima_draw.c (diff) |
 | src/gallium/drivers/r300/r300_blit.c (diff) |
 | src/util/format/u_format_pack.py (diff) |
 | src/gallium/drivers/v3d/v3dx_state.c (diff) |
 | src/mesa/vbo/vbo_attrib_tmp.h (diff) |
 | src/freedreno/vulkan/tu_clear_blit.c (diff) |
 | src/gallium/auxiliary/translate/translate_generic.c (diff) |
 | src/freedreno/perfcntrs/fd2_perfcntr.c (diff) |
 | src/gallium/drivers/nouveau/nv30/nv30_state_validate.c (diff) |
 | src/util/tests/format/u_format_test.c (diff) |
 | src/gallium/drivers/r300/r300_state.c (diff) |
 | src/gallium/auxiliary/Makefile.sources (diff) |
 | src/gallium/tests/unit/u_half_test.c (diff) |
 | src/freedreno/fdl/fd5_layout_test.c (diff) |
 | src/gallium/auxiliary/meson.build (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c (diff) |
 | src/gallium/auxiliary/gallivm/lp_bld_conv.c (diff) |
 | src/gallium/drivers/lima/ir/pp/disasm.c (diff) |
 | src/freedreno/perfcntrs/fd5_perfcntr.c (diff) |
 | src/gallium/auxiliary/gallivm/lp_bld_const.c (diff) |
 | src/gallium/drivers/v3d/v3dx_emit.c (diff) |
 | src/gallium/auxiliary/tgsi/tgsi_exec.c (diff) |
 | src/gallium/drivers/lima/ir/pp/codegen.c (diff) |
 | src/util/half_float.c (diff) |
 | src/amd/vulkan/radv_formats.c (diff) |
 | src/gallium/auxiliary/util/u_half.h |
 | src/gallium/frontends/nine/vertexshader9.h (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_blend.c (diff) |
Commit
6f134a622b186df8a8b3b25d98cee70c78d1992a
by eric+margenir/validate: Improve the validation of blocks
This commit adds a number of new validation checks:
1. We now check that every block pointer in the IR points to a block that actually exists in a block list that's reachable from the nir_function_impl.
2. We assert that nir_function_impl::body is non-empty
3. We assert that the start block has no predecessors. This is important because we tend to put run-once code there.
4. We now validate some stuff on the end block.
Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6750>
|
 | src/compiler/nir/nir_validate.c (diff) |
Commit
b6a4172f1045783576c1bd2f97d4d8d9e031294d
by eric+margenir/lower_goto_ifs: Don't destroy SSA form in the process
There are two issues here:
1. If there are any phi nodes, we'll make complete hash of them. This isn't likely actually a problem because spirv_to_nir doesn't generate any actual phi nodes today. However, if we start doing any other passes before this, we may have a problem.
2. Even without phi nodes, we may still break SSA form. This can happen if we ever have to stick a block inside a conditional to satisfy weird CFG constraints. Doing so can cause it to no longer look like it dominates some of its uses even though, at runtime, it's guaranteed to be run first.
Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6750>
|
 | src/compiler/nir/nir_lower_goto_ifs.c (diff) |
|
 | src/compiler/nir/nir_dominance.c (diff) |
Commit
fa3c38ceb36eaa681f2ab0be7b07aefbeefc617d
by eric+margespirv: Only run repair_ssa if structured
We shouldn't need it if we're unstructured and the pass assumes structure so attempting to run it will assert-fail.
Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6750>
|
 | src/compiler/spirv/vtn_cfg.c (diff) |
Commit
dc010cb74e1a60645cfd088f51c88a13cf5687ba
by eric+margenir/lower_goto_ifs: Use rzalloc
In particular, SSA forks weren't always getting properly initialized which was causing asserts to fail.
Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6750>
|
 | src/compiler/nir/nir_lower_goto_ifs.c (diff) |
|
 | src/compiler/nir/nir_lower_goto_ifs.c (diff) |
Commit
57c9fc3cbaf59320d397df840d3004a58335aa04
by eric+margenir/lower_goto_ifs: Always include level dom_frontiers in prev_frontier
When we come in from some other level or from the parent, we need to ensure that the reach set is in prev_frontier but we also need to consider the dominance frontier of our level. Otherwise, we may end up leaving out possible blocks when computing the reach of a level.
Acked-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6750>
|
 | src/compiler/nir/nir_lower_goto_ifs.c (diff) |
Commit
25ebd7f90f83c4a78b68386b248983f624c3678e
by eric+margeRevert "nir/lower_goto_if: Add a route::outside set"
This reverts commit d57573dcd4aa2160f3153df466b01f377484a3fa. The actual bug was an issue with prev_frontiers which has been properly fixed in the previous commit.
Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6750>
|
 | src/compiler/nir/nir_lower_goto_ifs.c (diff) |
Commit
8dc8922af257e454f4460bbc5993df5647968146
by eric+margeturnip: implement legacy API functions separately
Move legacy API functions to a separate file, and implement them by calling the new API functions, like tu_CreateRenderPass was already doing.
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6920>
|
 | src/freedreno/vulkan/tu_cmd_buffer.c (diff) |
 | src/freedreno/vulkan/tu_formats.c (diff) |
 | src/freedreno/vulkan/tu_legacy.c |
 | src/freedreno/vulkan/tu_pass.c (diff) |
 | src/freedreno/vulkan/tu_device.c (diff) |
 | src/freedreno/vulkan/meson.build (diff) |
Commit
bd60e31c837b9c8ed48f6b4db0b93b14ab46135e
by eric+margefreedreno/ir3: Make sure we run the opt loop after lowering UBOs to vec4.
The lowering pass may introduce vector bcsels that we need to scalarize back out. It's unusual to have UBOs and not get any lowered to push constants, so the flag was usually set anyway.
Fixes: 2b2524099379 ("freedreno/ir3: Replace our custom vec4 UBO intrinsic with the shared lowering.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6612>
|
 | src/freedreno/ir3/ir3_nir.c (diff) |
Commit
6c1c5714409c1e49f941289396cc5112da95dad9
by eric+margenir: Document a bit about how align_mul/offset work.
Introduces a #define for the maximum valid align_mul that's used in the load_store_vectorizer tests (currently, though it will be used more soon).
Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6612>
|
 | src/compiler/nir/tests/load_store_vectorizer_tests.cpp (diff) |
 | src/compiler/nir/nir.h (diff) |
Commit
c88c89ff3ea05cc168d1514fab1b71de2a357bb2
by eric+margenir: Print the alignment information on casts.
I wanted it for debugging GL alignment.
Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6612>
|
 | src/compiler/nir/nir_print.c (diff) |
Commit
ffbfc1ec0eb9190e8e7fa099631917e2987db325
by eric+margenir/nir_lower_uniforms_to_ubo: Set better alignments on our new instructions.
The change on freedreno is in the noise.
Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6612>
|
 | src/compiler/nir/nir_lower_uniforms_to_ubo.c (diff) |
Commit
9c5a793dc72bf6977643b0fc8bf8b1579639d7d7
by eric+margenir/gl_nir_lower_buffers: Set up align_mul/offset on UBOs.
nir_lower_to_explicit_io will give us good alignments if we have the cast's alignment information known, and it's trivial: Just the offset of the UBO variable that is at the base of the deref. Otherwise, explicit io assumes the load is aligned just to the size of a scalar value in it.
The change in freedreno is in the noise.
Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6612>
|
 | src/compiler/glsl/gl_nir_lower_buffers.c (diff) |
Commit
5f757bb95c20cdebed578b851e9f204b8aa6c014
by eric+margenir: Make the load_store_vectorizer provide align_mul + align_offset.
It was passing an encoding of the two that wasn't good for ensuring "Don't combine loads that would make us straddle a vec4 boundary" for nir_lower_ubo_vec4.
Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6612>
|
 | src/compiler/nir/nir_opt_load_store_vectorize.c (diff) |
 | src/compiler/nir/tests/load_store_vectorizer_tests.cpp (diff) |
 | src/compiler/nir/nir.h (diff) |
 | src/amd/compiler/aco_instruction_selection_setup.cpp (diff) |
 | src/intel/compiler/brw_nir.c (diff) |
Commit
618556a8cbdf86c31eb359c043cc9c629dc6fc0b
by eric+margenir: Drop the high_offset argument to the load_store_vectorizer filter.
Nothing uses it, and it's not clear to me what it provides over alignment/num_components/bit_size.
Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6612>
|
 | src/compiler/nir/tests/load_store_vectorizer_tests.cpp (diff) |
 | src/intel/compiler/brw_nir.c (diff) |
 | src/compiler/nir/nir.h (diff) |
 | src/amd/compiler/aco_instruction_selection_setup.cpp (diff) |
 | src/compiler/nir/nir_opt_load_store_vectorize.c (diff) |
Commit
e3f465580511153daca9ec9085375bd518ed5b24
by eric+margenir: Make nir_lower_ubo_vec4() handle non-vec4-aligned loads.
It turns out I had missed a case in my enumeration of why everything currently was vec4-aligned.
Fixes a simple testcase of loading from a vec3[2] array in freedreno with IR3_SHADER_DEBUG=nouboopt.
Initial shader-db results look devastating:
total instructions in shared programs: 8019997 -> 12829370 (59.97%) total cat6 in shared programs: 87683 -> 145840 (66.33%)
Hopefully this will recover once we introduce the i/o vectorizer, but that was blocked on getting the vec3 case fixed.
Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6612>
|
 | src/compiler/nir/nir_lower_ubo_vec4.c (diff) |
Commit
49ec863e8303170fd2a871689f9d9366215dca7e
by eric+margefreedreno/ir3: Enable the i/o vectorizer on UBOs.
This will merge loads of UBO components together into vec4 loads. At the same time, it improves the alignment information on our loads, fixing the regression from the vec3 loads fix.
shader-db results: total instructions in shared programs: 12829370 -> 8755851 (-31.75%) total cat6 in shared programs: 145840 -> 97027 (-33.47%)
Overall results from before the vec3 fix: total instructions in shared programs: 8019997 -> 8755851 (9.18%) total cat6 in shared programs: 87683 -> 97027 (10.66%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6612>
|
 | src/freedreno/ir3/ir3_nir.c (diff) |
|
 | docs/relnotes/20.1.9.rst |
|
 | docs/release-calendar.rst (diff) |
 | docs/relnotes.rst (diff) |
|
 | docs/release-calendar.rst (diff) |
Commit
5e8791a0bf00384cbd7e3a7231bddbc48bd550a8
by eric+margeradeonsi: Fix dead lock with aux_context_lock in si_screen_clear_buffer.
After disable SDMA on Arcturus(gfx9), dead lock with aux_context_lock is detected since si_screen_clear_buffer is called recursively before release lock.
The call trace is: si_clear_render_target->si_compute_clear_render_target-> si_launch_grid_internal->si_launch_grid->si_emit_cache_flush-> si_prim_discard_signal_next_compute_ib_start->u_suballocator_alloc-> si_resource_create->si_buffer_create->si_alloc_resource-> si_screen_clear_buffer->simple_mtx_lock-> si_sdma_clear_buffer->si_pipe_clear_buffer-> si_clear_buffer->si_compute_do_clear_or_copy-> si_launch_grid_internal->si_launch_grid->si_emit_cache_flush-> si_prim_discard_signal_next_compute_ib_start->u_suballocator_alloc-> si_resource_create->si_buffer_create->si_alloc_resource-> si_screen_clear_buffer->simple_mtx_lock
Fixes: 07a49bf5976 "radeonsi: disable SDMA on gfx9" Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6941>
|
 | src/gallium/drivers/radeonsi/si_pipe.c (diff) |
Commit
e94fd4cc65899bccceb4642363bc4376c6831580
by eric+margelavapipe: rename vallium to lavapipe
Just a cooler name, and a lot easier to search for. thanks Marek
Acked-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6921>
|
 | src/gallium/frontends/vallium/val_cmd_buffer.c |
 | src/gallium/frontends/lavapipe/lvp_lower_input_attachments.c |
 | src/gallium/frontends/lavapipe/lvp_query.c |
 | src/gallium/frontends/lavapipe/lvp_pass.c |
 | src/gallium/targets/vallium/val_icd.py |
 | src/gallium/targets/lavapipe/target.c |
 | src/gallium/frontends/vallium/val_entrypoints_gen.py |
 | src/gallium/frontends/lavapipe/lvp_execute.c |
 | src/gallium/frontends/vallium/meson.build |
 | src/gallium/targets/vallium/meson.build |
 | src/gallium/frontends/vallium/val_lower_vulkan_resource.c |
 | src/gallium/frontends/vallium/val_wsi_wayland.c |
 | src/gallium/frontends/lavapipe/lvp_entrypoints_gen.py |
 | src/gallium/frontends/lavapipe/lvp_wsi_wayland.c |
 | src/gallium/frontends/vallium/val_pipeline.c |
 | src/gallium/frontends/vallium/val_lower_vulkan_resource.h |
 | src/gallium/frontends/vallium/val_descriptor_set.c |
 | src/gallium/targets/lavapipe/meson.build |
 | src/gallium/frontends/lavapipe/lvp_device.c |
 | src/gallium/frontends/lavapipe/meson.build |
 | src/gallium/frontends/vallium/val_private.h |
 | src/gallium/frontends/lavapipe/lvp_formats.c |
 | src/gallium/frontends/vallium/val_util.c |
 | src/gallium/frontends/lavapipe/lvp_image.c |
 | src/gallium/targets/vallium/target.c |
 | src/gallium/frontends/lavapipe/lvp_extensions.py |
 | src/gallium/frontends/vallium/val_device.c |
 | src/gallium/frontends/lavapipe/lvp_pipeline_cache.c |
 | src/gallium/frontends/lavapipe/lvp_wsi_x11.c |
 | src/gallium/frontends/vallium/val_conv.h |
 | src/gallium/frontends/vallium/val_formats.c |
 | src/gallium/frontends/lavapipe/lvp_private.h |
 | src/gallium/frontends/vallium/val_execute.c |
 | src/gallium/frontends/lavapipe/lvp_wsi.c |
 | src/gallium/frontends/lavapipe/lvp_conv.h |
 | src/gallium/frontends/vallium/val_extensions.py |
 | src/gallium/frontends/vallium/val_wsi_x11.c |
 | src/gallium/frontends/vallium/val_wsi.c |
 | src/gallium/frontends/lavapipe/lvp_lower_vulkan_resource.c |
 | src/gallium/targets/lavapipe/lvp_icd.py |
 | src/gallium/frontends/vallium/val_lower_input_attachments.c |
 | src/gallium/frontends/lavapipe/lvp_cmd_buffer.c |
 | src/gallium/frontends/lavapipe/lvp_descriptor_set.c |
 | src/gallium/frontends/vallium/val_query.c |
 | src/gallium/frontends/vallium/val_wsi.h |
 | src/gallium/frontends/vallium/val_pipeline_cache.c |
 | src/gallium/meson.build (diff) |
 | src/gallium/frontends/lavapipe/lvp_wsi.h |
 | src/gallium/frontends/vallium/val_pass.c |
 | src/gallium/frontends/lavapipe/lvp_util.c |
 | src/gallium/frontends/vallium/val_image.c |
 | src/gallium/frontends/lavapipe/lvp_lower_vulkan_resource.h |
 | src/gallium/frontends/lavapipe/lvp_pipeline.c |
Commit
892e74d2f7c6e443f57c03508ddb5647142588dd
by samuel.pitoisetradv: fix gathering writes_memory for global store/atomic operations
Because global operations are lowered before the shader info pass now we have to adjust the gathering code.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3578 Fixes: 1588644543d ("radv: lower deref operations for global memory for both backends") Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6934>
|
 | src/amd/vulkan/radv_shader_info.c (diff) |
Commit
8227b08c08182fe7b75e2ec3b8b7531cfebaef59
by eric+margeac/llvm: fix invalid use of unreachable in ac_build_atomic_rmw()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6936>
|
 | src/amd/llvm/ac_llvm_helper.cpp (diff) |
Commit
b00a023f1e16a280730650952134ce9b72382987
by eric+margeac/nir: fix nir_intrinsic_shared_atomic_fadd
This was completely broken.
Fixes dEQP-VK.glsl.atomic_operations.add_float32_compute_shared.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6936>
|
 | src/amd/llvm/ac_llvm_helper.cpp (diff) |
 | src/amd/llvm/ac_nir_to_llvm.c (diff) |
Commit
79368ab302f925f705a02d60f09ea2d609628ce1
by cwabbott0ttn: Fix number of components for IF/UIF
NIR if statements only take one component, but TGSI registers are vec4. We're supposed to compare the x component, per https://docs.mesa3d.org/gallium/tgsi.html#opcode-IF.
Fixes: f103bded ("ttn: Use nir control flow insertion helpers") Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Tested-by: Leo Liu <leo.liu@amd.com> Closes: #3585 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6956>
|
 | src/gallium/auxiliary/nir/tgsi_to_nir.c (diff) |
Commit
2c322514f3825095804c491582f3457d6f06282d
by eric+margeradv: gather output usage mask from store_output for VS, TES and GS
IO are now lowered before the shader info pass is called and the output usage masks have to be gathered from store_output instead.
This is currently only used by ACO.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6897>
|
 | src/amd/vulkan/radv_shader_info.c (diff) |
Commit
df6349159443dc365705d2363c1f5daaa387508e
by eric+margeradv/aco: lower IO for all stages outside of ACO
Lowering IO for VS, TCS, TES and GS still have to be done for LLVM.
No fossils-db change on NAVI10.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6897>
|
 | src/amd/vulkan/radv_shader.c (diff) |
 | src/amd/vulkan/radv_pipeline.c (diff) |
 | src/amd/compiler/aco_instruction_selection_setup.cpp (diff) |
 | src/amd/vulkan/radv_shader.h (diff) |
Commit
03af98abe26e738f2d4175a5e97dc9d62e386493
by eric+margeradeonsi: support for external buffers (ext_external_objects)
So far, the callback to create a resource from a memory object had code for importing textures only. Modified it to allow importing buffers too.
Fixes the following piglit tests: - ext_external_objects/vk-buf-exchange - ext_external_objects/vk-pix-buf-update-errors - ext_external_objects/vk-vert-buf-update-errors - ext_external_objects/vk-vert-buf-reuse
v2: Used si_alloc_buffer_struct instead of CALLOC v3: Fixed indentation issue, removed free in case of unsuccessful allocation, joined two if conditions together
Signed-off-by: Eleni Maria Stea <estea@igalia.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6364>
|
 | src/gallium/drivers/radeonsi/si_buffer.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.h (diff) |
 | src/gallium/drivers/radeonsi/si_texture.c (diff) |
Commit
7c92e413afe24695c216c9e20ef24296ac1e6e09
by eric+margeanv: Allow HiZ clears for multi-view
Now that we're enabling HiZ on multi-layer images, there's no reason why we can't enable HiZ clears for multi-view. The only reason I can think of why we didn't before was because no one thought to and the old code didn't. Enabling this means that an attachment will get HiZ cleared if and only if att_state->fast_clear.
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6549>
|
 | src/intel/vulkan/genX_cmd_buffer.c (diff) |
Commit
e9d5ec342d1069018597b34e9d37607c29749564
by eric+margeanv: Use more temp vars in cmd_buffer_begin_subpass
This is a mostly cosmetic change but there is one subtle functional issue: If we ever render to a 3D depth image, we are now handling the base layer and number of layers correctly. I'm not sure rendering to 3D depth is even allowed but we can theoretically handle it now.
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6549>
|
 | src/intel/vulkan/genX_cmd_buffer.c (diff) |
Commit
d5849bc840e5167b5b735d9e3f1ec1e8e1197c98
by eric+margeanv: Skip HiZ and CCS ambiguates which preceed fast-clears
This gets rid of multiple HiZ ambiguate operations per frame in Witcher 3.
v2: - Fix typo (Tapani)
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6549>
|
 | src/intel/vulkan/genX_cmd_buffer.c (diff) |
Commit
b02bef01c89872434d957c2a5cc9b30cbe32d92d
by eric+margeintel/blorp: Conditionally clear full surface depth and stencil
We should set "Full Surface Depth and Stencil Clear" field of WM_HZ_OP 3DSTATE packet, only when application requires the entire depth surface to be cleared.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6549>
|
 | src/intel/blorp/blorp_clear.c (diff) |
Commit
30c3b2c0b602a7e9f9d1246c2de61cf1ef38f4ae
by eric+margeradeonsi: simplify NGG culling enablement and add radeonsi_shader_culling option
Add a vertex count threshold into si_shader_selector to simplify the draw_vbo code.
The new option is supposed to be used in 00-mesa-defaults.conf and should be tweaked for best performance unlike the AMD_DEBUG experimental options.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6948>
|
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_draw.c (diff) |
 | src/gallium/drivers/radeonsi/si_pipe.h (diff) |
 | src/gallium/drivers/radeonsi/si_debug_options.h (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
Commit
f5912c6d326d9ae850b6bedc100ec20df91ef7f7
by eric+margeradeonsi: kill disabled clip distances and planes at per-channel granularity
Apps often enable only 1 plane for gl_ClipVertex, which means 1 scalar clip distance.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6948>
|
 | src/gallium/drivers/radeonsi/si_shader.h (diff) |
 | src/gallium/drivers/radeonsi/si_shader_llvm_vs.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_state.c (diff) |
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
Commit
701f7ae9d25a3fc8f120c17a2e5295ff4ecfe7d1
by eric+margeradeonsi: move si_set_active_descriptors_for_shader into si_update_common_shader_state
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6948>
|
 | src/gallium/drivers/radeonsi/si_state_shaders.c (diff) |
Commit
fd6bbdcf59dc5b87fed31f8fc51a2b27eaedfbb2
by eric+margeradeonsi: use staging buffer uploads for most VRAM buffers
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6948>
|
 | src/gallium/drivers/radeonsi/si_buffer.c (diff) |
Commit
d5cb7bd5274199e47365fa7c0732fbf94d03feda
by eric+margeradeonsi: call nir_lower_bool_to_int32 last because it breaks nir_opt_if
The new place is where shader variants are generated.
This is a prerequisite for inlinable uniforms.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6948>
|
 | src/gallium/drivers/radeonsi/si_shader.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
Commit
237f4d9d187ec21d880c7fb4441456d22b4269b6
by eric+margeradeonsi: restructure si_pipe_set_constant_buffer
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6948>
|
 | src/gallium/drivers/radeonsi/si_descriptors.c (diff) |
Commit
545d852a7a7bc8a509d22096bdb7fb578d4bab65
by anuj.phogatintel/gen9: Enable MSC RAW Hazard Avoidance
Workaround # 22011374674 Applied to i965, iris and anv drivers No performance impact is observed with WA.
Cc: mesa-stable Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
|
 | src/intel/vulkan/genX_state.c (diff) |
 | src/gallium/drivers/iris/iris_state.c (diff) |
 | src/mesa/drivers/dri/i965/brw_state_upload.c (diff) |
 | src/mesa/drivers/dri/i965/brw_defines.h (diff) |
Commit
35b162eb2c0b8d8b3d41e276e9193bd9b0edd464
by airliedgallivm/nir: make sure to mask global reads.
Make the driver only read values for the active lanes, otherwise it can cause unwanted oob accesses that aren't the apps fault.
Reviewed-by: Roland Scheidegger <sroland@vmware.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6954>
|
 | src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c (diff) |
Commit
e8f1cc41db3aab4f2fe3462749f096986effa972
by airliedllvmpipe/cs: add in shader shared size.
(can remove lavapipe setting this later).
Reviewed-by: Roland Scheidegger <sroland@vmware.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6954>
|
 | src/gallium/drivers/llvmpipe/lp_state_cs.c (diff) |
Commit
4c70f1ba2fb2ef0aef33d0f7f160ad110b731615
by airliedgallivm/nir: fix non-32 bit find lsb/msb
fixes piglit cl get-global-id
Reviewed-by: Roland Scheidegger <sroland@vmware.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6954>
|
 | src/gallium/auxiliary/gallivm/lp_bld_nir.c (diff) |
Commit
0aa08ae2f673a36709c5485679d4c89a747ec0e9
by eric+margenir: Split NIR_INTRINSIC_TYPE into separate src/dest indices
We're about to introduce conversion ops which are going to want two different types. We may as well just split the one we have rather than end up with three. There are a couple places where this is mildly inconvenient but most of the time I find it to actually be nicer.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6945>
|
 | src/compiler/nir/nir_lower_io_to_scalar.c (diff) |
 | src/compiler/nir/nir_lower_mediump_outputs.c (diff) |
 | src/compiler/nir/nir.h (diff) |
 | src/gallium/drivers/lima/ir/lima_nir_split_load_input.c (diff) |
 | src/gallium/drivers/radeonsi/si_shader_nir.c (diff) |
 | src/freedreno/ir3/ir3_image.c (diff) |
 | src/gallium/auxiliary/nir/tgsi_to_nir.c (diff) |
 | src/compiler/glsl/glsl_to_nir.cpp (diff) |
 | src/compiler/nir/nir_lower_io.c (diff) |
 | src/broadcom/compiler/v3d_nir_lower_logic_ops.c (diff) |
 | src/compiler/spirv/spirv_to_nir.c (diff) |
 | src/panfrost/bifrost/bifrost_compile.c (diff) |
 | src/compiler/nir/nir_lower_passthrough_edgeflags.c (diff) |
 | src/compiler/nir/nir_lower_cl_images_to_tex.c (diff) |
 | src/compiler/nir/nir_gather_ssa_types.c (diff) |
 | src/gallium/drivers/lima/ir/lima_nir_lower_uniform_to_scalar.c (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_nir.c (diff) |
 | src/compiler/nir/nir_print.c (diff) |
 | src/compiler/nir/nir_intrinsics.py (diff) |
 | src/compiler/nir/nir.c (diff) |
 | src/panfrost/midgard/midgard_compile.c (diff) |
Commit
588bb6686b38ecb6316269fe20792dea5aab819d
by eric+margenir: Add a conversion and rounding intrinsic
This new intrinsic is capable of handling the full range of conversions from OpenCL including rounding modes and possible saturation. The intention is that we'll emit this intrinsic directly from spirv_to_nir and then lower it to ALU ops later.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6945>
|
 | src/compiler/nir/nir_builder.h (diff) |
 | src/compiler/nir/nir_validate.c (diff) |
 | src/compiler/nir/nir_print.c (diff) |
 | src/compiler/nir/nir.h (diff) |
 | src/compiler/nir/nir_intrinsics.py (diff) |
Commit
d5cb51e2b917a012f8220017e07e6d00d957dd0c
by eric+margenir: Add builder helpers for OpenCL type conversions
Most of these were originally written by Daniel Stone in the Microsoft ClOn12 branch, reworked by Jesse Natalie, fixed by Boris Brezillon, and possibly touched by others along the way. Unfortunately, none of that is in the commit history thanks to living in the CLOn12 branch.
I ported them to mesa master and further reworked things for better cosmetics. In particular,
1. They now live in a builder helper rather than in vtn_alu.c.
2. Instead of looping inside each builder helper, we just trust NIR vector instructions to handle vectors.
3. Lots of re-arranging of the helpers for clarity, better asserting, and better re-use with the upcoming lowering pass.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6945>
|
 | src/compiler/Makefile.sources (diff) |
 | src/compiler/nir/nir_conversion_builder.h |
 | src/compiler/nir/meson.build (diff) |
Commit
383ecfbc70966a91382272c249b9750f3cff9031
by eric+margenir: Add a passes for nir_intrinsic_convert_alu_types
This adds primarily two passes: One is a lowering pass which turns these conversion intrinsics into a series of ALU ops. The other is an optimization pass which attempt to simplify the conversion whenever possible in the hopes that we can turn it into a "normal" conversion op which doesn't need special treatment.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6945>
|
 | src/compiler/Makefile.sources (diff) |
 | src/compiler/nir/meson.build (diff) |
 | src/compiler/nir/nir_lower_convert_alu_types.c |
 | src/compiler/nir/nir.h (diff) |
Commit
8e8458218c6e6668fc33fd99d44276ffc7d0d921
by eric+margespirv: Add some conversion handling helpers
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6945>
|
 | src/compiler/spirv/vtn_alu.c (diff) |
Commit
8610af12b6a64011df905b9b0ab2d773dfaae139
by eric+margespirv: Handle all OpenCL conversion ops with full rounding
This is done for kernels via the new convert_alu_types intrinsic. For Vulkan and OpenGL, we maintain the old path so that drivers don't have to add that lowering pass.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6945>
|
 | src/compiler/spirv/vtn_alu.c (diff) |
 | src/compiler/spirv/spirv_to_nir.c (diff) |
Commit
a85afb797e7c6f49cbe76baf51385d2b58478c5c
by eric+margespirv/opencl: Drop dest_type from handle_v_load_store
At that point in the function, we don't know if it's a load or a store so calling it dest_type isn't really helpful. Also, we don't really want the glsl_type; we want the base_type.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6945>
|
 | src/compiler/spirv/vtn_opencl.c (diff) |
Commit
7d97f3dfdc8da92c9b4dfd22551e169e9343e9c9
by eric+margespirv: Implement vload[a]_half[n] and vstore[a]_half[n][_r]
Note, the aligned versions aren't handled specially yet.
The float16buffer capability is now at least partially supported after this patch, so move it to be supported when kernels are supported.
v2 (Jason Ekstrand): - A few cosmetic cleanups around type/base_type - Rebased on top of the big SPIR-V SSA value rework - Use the new version of the conversion helpers
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6945>
|
 | src/compiler/spirv/vtn_private.h (diff) |
 | src/compiler/spirv/vtn_alu.c (diff) |
 | src/compiler/spirv/vtn_opencl.c (diff) |
 | src/compiler/spirv/spirv_to_nir.c (diff) |
|
 | src/gallium/frontends/clover/nir/invocation.cpp (diff) |
|
 | src/compiler/nir/nir.h (diff) |
 | src/compiler/nir/nir_lower_convert_alu_types.c (diff) |
Commit
a648aea3fdf5c3988063701a0d13caff911b8de1
by issor.oruamandroid: gallium/iris: cleanup iris_driinfo.h gen rules
Android.mk and Makefile.sources are still defining iris_driinfo.h target This patch removes the remaining gen rules
Fixes the following building error:
FAILED: out/target/product/x86_64/obj/STATIC_LIBRARIES/libmesa_pipe_iris_intermediates/iris/iris_driinfo.h ... cp: bad 'out/target/product/x86_64/gen/STATIC_LIBRARIES/libmesa_pipe_iris_intermediates/iris/iris_driinfo.h': No such file or directory
Fixes: 974981c4e6b9 ("gallium/drm: Make the pipe loader handle the driconf merging.") Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6880>
|
 | src/gallium/drivers/iris/Makefile.sources (diff) |
 | src/gallium/drivers/iris/Android.mk (diff) |
Commit
d7fbf94ae846e4cffb6ee62257c7aca7871180bf
by issor.oruamandroid: gallium/radeonsi: cleanup si_driinfo.h gen rules
Android.mk and Makefile.sources are still defining si_driinfo.h target This patch removes the remaining gen rules
Fixes the following building error:
FAILED: out/target/product/x86_64/obj/STATIC_LIBRARIES/libmesa_pipe_radeonsi_intermediates/radeonsi/si_driinfo.h ... cp: bad 'out/target/product/x86_64/gen/STATIC_LIBRARIES/libmesa_pipe_radeonsi_intermediates/radeonsi/si_driinfo.h': No such file or directory
Fixes: 974981c4e6b9 ("gallium/drm: Make the pipe loader handle the driconf merging.") Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6880>
|
 | src/gallium/drivers/radeonsi/Android.mk (diff) |
 | src/gallium/drivers/radeonsi/Makefile.sources (diff) |
Commit
4a0164ed85f309ad4909bb481f16d5d4f8337181
by issor.oruamandroid: gallium/virgl: cleanup virgl_driinfo.h gen rules
Android.mk and Makefile.sources are still defining virgl_driinfo.h target This patch removes the remaining gen rules
Fixes the following building error:
FAILED: out/target/product/x86_64/obj/STATIC_LIBRARIES/libmesa_pipe_virgl_intermediates/virgl/virgl_driinfo.h ... cp: bad 'out/target/product/x86_64/gen/STATIC_LIBRARIES/libmesa_pipe_virgl_intermediates/virgl/virgl_driinfo.h': No such file or directory
Fixes: 974981c4e6b9 ("gallium/drm: Make the pipe loader handle the driconf merging.") Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Acked-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6880>
|
 | src/gallium/drivers/virgl/Android.mk (diff) |
Commit
1aac47db69d5cf40329ccd26acfea8f615db3415
by eric+margeRevert F16C series (MR 6774)
This reverts commit 4fb2eddfdf9adafde2e6f94de23202ee44123d59. This reverts commit 7a1deb16f8af4e0ae4ed64511cbfcc606087f0ee. This reverts commit 2b6a17234376817e75d1f81edf5bd1b28eefb374. This reverts commit 5af81393e419eaf086e4de2a1d149af78cd1f54d. This reverts commit 87900afe5bbe90c5f3ad0921b28ae1c889029ada.
A couple of problems were discovered after this series was merged that cause breakage in different configurations:
(1) It seems that using -mf16c also enables AVX, leading to SIGILL on platforms that do not support AVX. (2) Since clang only warns about unknown flags, and as I understand it Meson's handling in cc.has_argument() is broken, the F16C code is wrongly enabled when clang is used, even for example on ARM, leading to a compilation error.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3583 Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6969>
|
 | src/gallium/auxiliary/util/u_half.h |
 | src/gallium/frontends/nine/vertexshader9.h (diff) |
 | src/freedreno/perfcntrs/fd5_perfcntr.c (diff) |
 | src/gallium/drivers/freedreno/freedreno_util.h (diff) |
 | src/gallium/tests/unit/u_half_test.c (diff) |
 | src/freedreno/rnn/headergen2.c (diff) |
 | src/freedreno/vulkan/tu_clear_blit.c (diff) |
 | src/gallium/auxiliary/gallivm/lp_bld_const.c (diff) |
 | src/gallium/auxiliary/gallivm/lp_bld_conv.c (diff) |
 | src/gallium/drivers/lima/ir/pp/codegen.c (diff) |
 | src/gallium/drivers/freedreno/a5xx/fd5_emit.c (diff) |
 | src/amd/vulkan/radv_formats.c (diff) |
 | src/mesa/vbo/vbo_attrib_tmp.h (diff) |
 | src/freedreno/perfcntrs/fd2_perfcntr.c (diff) |
 | src/gallium/tests/unit/translate_test.c (diff) |
 | src/util/half_float.c (diff) |
 | src/util/softfloat.h (diff) |
 | src/gallium/auxiliary/tgsi/tgsi_exec.c (diff) |
 | src/gallium/drivers/v3d/v3dx_state.c (diff) |
 | src/gallium/drivers/freedreno/a6xx/fd6_emit.c (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_blend.c (diff) |
 | src/freedreno/perfcntrs/fd6_perfcntr.c (diff) |
 | src/freedreno/perfcntrs/freedreno_perfcntr.h (diff) |
 | src/freedreno/fdl/fd5_layout_test.c (diff) |
 | meson.build (diff) |
 | src/util/half_float.h (diff) |
 | src/gallium/drivers/freedreno/freedreno_texture.c (diff) |
 | src/util/format/u_format_pack.py (diff) |
 | src/gallium/drivers/lima/ir/pp/disasm.c (diff) |
 | src/util/softfloat.c (diff) |
 | src/util/format/u_format_tests.c (diff) |
 | src/gallium/drivers/nouveau/nv30/nv30_state_validate.c (diff) |
 | src/gallium/drivers/r300/r300_blit.c (diff) |
 | .gitlab-ci/piglit/quick_gl.txt (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_disasm.c (diff) |
 | src/gallium/auxiliary/translate/translate_generic.c (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c (diff) |
 | src/gallium/drivers/r300/r300_state.c (diff) |
 | src/gallium/auxiliary/Makefile.sources (diff) |
 | src/freedreno/registers/gen_header.py (diff) |
 | src/gallium/auxiliary/meson.build (diff) |
 | src/gallium/drivers/v3d/v3dx_emit.c (diff) |
 | src/util/tests/format/u_format_test.c (diff) |
 | src/gallium/drivers/etnaviv/etnaviv_zsa.c (diff) |
 | src/gallium/drivers/lima/lima_draw.c (diff) |
Commit
c73c0cc31775f3a1532e0f0b9e1d2e956ff1b00e
by gurchetansinghvirgl: add flags to (*resource_create) callback
We never seemed to use these. But for ARB_buffer_storage we'll need it.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4821>
|
 | src/gallium/winsys/virgl/common/virgl_resource_cache.c (diff) |
 | src/gallium/drivers/virgl/virgl_winsys.h (diff) |
 | src/gallium/drivers/virgl/virgl_resource.h (diff) |
 | src/gallium/winsys/virgl/drm/virgl_drm_winsys.h (diff) |
 | src/gallium/drivers/virgl/virgl_staging_mgr.c (diff) |
 | src/gallium/winsys/virgl/vtest/virgl_vtest_winsys.c (diff) |
 | src/gallium/drivers/virgl/tests/virgl_staging_mgr_test.cpp (diff) |
 | src/gallium/winsys/virgl/common/virgl_resource_cache.h (diff) |
 | src/gallium/winsys/virgl/drm/virgl_drm_winsys.c (diff) |
 | src/gallium/drivers/virgl/virgl_resource.c (diff) |
Commit
7b7f2108256dff6bfa32a9b108ec8339c8a2eeb4
by gurchetansinghdrm-uapi: virtgpu_drm.h: resource create blob + host visible memory region
Matches current API at virgl/resource_blob. Of course, don't submit until this lands in drm.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4821>
|
 | include/drm-uapi/virtgpu_drm.h (diff) |
Commit
e01ec6ed2d4950be5acc1242c5c3916f4fe59587
by gurchetansinghvirgl/drm: query for resource blob and host visible memory region
Check for these features.
v2: refactor querying params in general (@shadeslayer)
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4821>
|
 | src/gallium/winsys/virgl/drm/virgl_drm_winsys.h (diff) |
 | src/gallium/drivers/virgl/virgl_winsys.h (diff) |
 | src/gallium/winsys/virgl/drm/virgl_drm_winsys.c (diff) |
Commit
cd31f46f08a7a60a7f2ca074b817f5fd2034746a
by gurchetansinghvirgl/drm: add resource create blob function
A blob resource is a container for: - VIRTGPU_BLOB_MEM_GUEST: a guest memory allocation (referred to as a "guest-only blob resource")
- VIRTGPU_BLOB_MEM_HOST3D: a host3d memory allocation (referred to as a "host-only blob resource")
- VIRTGPU_BLOB_MEM_HOST3D_GUEST: a guest + host3d memory allocation (referred to as a "default blob resource").
Blob resources can be used to implement new features and fix shortcomings with the current resource create path. The subsequent patches how blob resources may be leveraged to implement GL_ARB_buffer_storage and get GL4.5.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4821>
|
 | src/gallium/winsys/virgl/drm/virgl_drm_winsys.c (diff) |
 | src/gallium/winsys/virgl/drm/virgl_drm_winsys.h (diff) |
Commit
3b54e5837a15236407f5ea0c98dfe3f23c6fe7b1
by gurchetansinghvirgl: support PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT
We should have GL4.5 with this. Piglit tests should now pass. In terms of performance, we're between 70% to 80% of host performance on Iris, based on a apitrace of a 2013 GL4.5 game:
11.204 FPS (guest) 15.947 FPS (host)
This is still better than the status quo, when said game was unplayable with Virgl due to an inefficient GL4.3 fallback.
TEST=piglit -t arb_buffer_storage all results/ passes
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4821>
|
 | src/gallium/drivers/virgl/virgl_screen.c (diff) |
 | src/gallium/drivers/virgl/virgl_buffer.c (diff) |
 | src/gallium/winsys/virgl/drm/virgl_drm_winsys.c (diff) |
Commit
87383e3163d3425cf34d7b9be80a4877ec4a3dfc
by gurchetansinghvirgl: query blob mem
Resource blob also modifies resource info. Let's use this functionality.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4821>
|
 | src/gallium/winsys/virgl/drm/virgl_drm_winsys.h (diff) |
 | src/gallium/drivers/virgl/virgl_resource.c (diff) |
 | src/gallium/drivers/virgl/virgl_resource.h (diff) |
 | src/gallium/winsys/virgl/drm/virgl_drm_winsys.c (diff) |
 | src/gallium/drivers/virgl/virgl_winsys.h (diff) |
Commit
5c2129d4347ddf44e299f014335beeb239360fca
by gurchetansinghvirgl: fix stride + layer_stride inconsistency
With blob resources, stride doesn't necesarily have to equal width * bpp. The use case for this a minigbm blob resource with blob mem BLOB_MEM_HOST3D_GUEST imported into guest Mesa. In addition, for BLOB_MEM_HOST we can repurpose the transfer ioctls to also flush caches if need be, so this seems a good time to fix this issue.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4821>
|
 | src/gallium/winsys/virgl/drm/virgl_drm_winsys.h (diff) |
 | src/gallium/drivers/virgl/virgl_encode.c (diff) |
 | src/gallium/winsys/virgl/drm/virgl_drm_winsys.c (diff) |
Commit
a8ac61b0ee2fdf4e8bc7b47aee9c24f96c40435c
by eric+margeintel/fs: NoMask initialize the address register for shuffles
Cc: mesa-stable@lists.freedesktop.org Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2979 Tested-by: Iván Briano <ivan.briano@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Francisco Jerez <currojerez@riseup.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6825>
|
 | src/intel/compiler/brw_fs_generator.cpp (diff) |
Commit
535fd6d45e658cea148f142c82f64a04838fb5ce
by eric+margefreedreno/cffdec: fix decoding of bindless descriptors
Add ADDR suffix so that regbase() doesn't fail and return 0.
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6968>
|
 | src/freedreno/decode/cffdec.c (diff) |
Commit
038fcbcaed31b97f8f477f2496f8cf0a809b1892
by eric+margeglsl: don't duplicate state vars as uniforms in the NIR linker
The linker was adding all state vars as uniforms, doubling the storage size for shaders using only builtin uniforms, which increased CPU overhead for constant buffer uploads.
When this code was originally ported from the GLSL IR linker we forgot to exclude builtins because the check was not done in the add_uniform_to_shader class but rather a check was done when passing variables to this class for processing.
Fixes: 664e4a610dc8 ("glsl/nir: Fill in the Parameters in NIR linker")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> Tested-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6958>
|
 | src/compiler/glsl/gl_nir_link_uniforms.c (diff) |
Commit
98bb74b67dfcac6b946246e110c953effc541be0
by jasonnir: Fix a misspelling
Fixes: cb95065dd122a "nir: Add lowering from regular ALU conversions..." Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6975>
|
 | src/compiler/nir/nir_lower_convert_alu_types.c (diff) |
 | src/compiler/nir/nir.h (diff) |
Commit
e3c7748b2e2c75e2a7d678333f175f179249dc4a
by eric+margeci/bare-metal: Move the "POWER_GOOD not seen in time" check to the right time.
The poweron failure happens before we get to the bootloader ("load_archive: loading locale_en.bin") not after we're trying to boot the kernel and we're waiting for the deqp run to complete.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6970>
|
 | .gitlab-ci/bare-metal/cros_servo_run.py (diff) |
|
 | src/freedreno/vulkan/tu_device.c (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
Commit
6089b00e893115440e657480a75afa5317b3ce2c
by eric+margeturnip: create LRZ buffer
v2: - Add missing vulkan subpass support. (Jonathan Marek) - When creating the BO, mark it as not valid until it is cleared. - Move LRZ struct to tu_image. (Jonathan Marek) - Destroy BO when we destroy the image. (Jonathan Marek)
v3: - Allocate the buffer as part of the image's BO (Connor) - Moved image's LRZ values to its layout.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
|
 | src/freedreno/vulkan/tu_private.h (diff) |
 | src/freedreno/vulkan/tu_image.c (diff) |
Commit
38f008e07bc6e4555afc2ee21e301447651c2d33
by eric+margeturnip: disable LRZ on specific cases
There are depth compare op modes that are not supported by LRZ in the HW. Also, it is not supported when blend or stencil are enabled.
v2:
* Set pipeline->lrz.write to the same value than depthWriteEnable. * Improve comment on disabling LRZ write on blend. * Remove pipeline's lrz invalidation when there is no clear mask in render pass. It is confusing. (Jonathan Marek) * Mark the pipeline state as changed. * Add comment on not using GREATER flag.
v3:
* Replace {rb,gras}_lrz_cntl by flags in struct tu_pipeline. * Added z_test_enable flag.
v4:
* Created struct tu_lrz_pipeline to avoid modifying immutable objects.
v5:
* Fixed crashes when pDepthStencilState pointer is NULL.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
|
 | src/freedreno/vulkan/tu_pipeline.c (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
|
 | src/freedreno/vulkan/tu_pipeline.c (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
Commit
fdad1ca25650828855e6ae347ee84e53fcef12d2
by eric+margeturnip: disable LRZ depending on fragment changes
Disable LRZ write if the fragment shader discard the fragments, modify its position or if early-Z is disabled.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
|
 | src/freedreno/vulkan/tu_pipeline.c (diff) |
|
 | src/freedreno/vulkan/tu_cmd_buffer.c (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
Commit
0b2cfd0668e3d827a2380c8ce6bc28c51d7a49ec
by eric+margeturnip: add LRZ valid tracking for secondary command buffers
After a secondary command buffer is executed, LRZ is not valid until it is cleared again.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
|
 | src/freedreno/vulkan/tu_cmd_buffer.c (diff) |
Commit
0ca87ed506287d7141a45238ac631a2cc5b6fa95
by eric+margeturnip: add support to clear LRZ
v2:
* Don't emit tu6_clear_lrz() using a IB but in the command stream provided. (Jonathan Marek) * Valid_clear_ib is always false if TU_DEBUG_NOLRZ is set. Remove the useless condition. (Jonathan Marek) * Added more comments. * Use r2d function for blitting LRZ. (Jonathan Marek)
v3: * Do LRZ tracking in the command buffer state (Connor).
v4:
* Simplify the emission of source setup (Jonathan Marek)
v5:
* Separate LRZ setup in a different function. * Not hide LRZ setup inside GMEM path (Jonathan Marek) * Fix iova address emission in tu6_clear_lrz() (Jonathan Marek) * Add CCU sysmem flushes (Jonathan Marek)
v6:
* Fixed bug related to storing a VkClearValue pointer that could be out-of-scope when we access to it for emitting LRZ clear.
v7:
* Merge tu6_clear_lrz() and tu6_clear_lrz_setup() into the same function and emit LRZ clear at the beginning of the renderpass.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
|
 | src/freedreno/vulkan/tu_clear_blit.c (diff) |
 | src/freedreno/vulkan/tu_private.h (diff) |
 | src/freedreno/vulkan/tu_cmd_buffer.c (diff) |
|
 | src/freedreno/vulkan/tu_cmd_buffer.c (diff) |
Commit
2f79e0066405f80c3244d1cc814bc6a51d1d581a
by eric+margeturnip: disable LRZ on vkCmdClearAttachments()
We don't support partial clears on LRZ. Blob disables them too.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
|
 | src/freedreno/vulkan/tu_clear_blit.c (diff) |
Commit
1d83f5ae8435c428a20fa947d6a2b22ae453e80c
by eric+margeturnip: disable LRZ on vkCmdClearattachments() 3D fallback path
Partial clears are not supported and we may end up having LRZ enabled from past commands.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
|
 | src/freedreno/vulkan/tu_clear_blit.c (diff) |
Commit
3c07a149986381847a8431db0491286c1fc10897
by eric+margeturnip: enable LRZ
v2:
* Use sub_cs when creating the IB in tu6_build_lrz(). (Jonathan Marek) * Emit tu6_build_lrz() only when pipeline state changes or there is a clear. (Jonathan Marek)
v3:
* Don't modify tu_pipeline object, track the changes in command buffer state.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
|
 | src/freedreno/vulkan/tu_private.h (diff) |
 | src/freedreno/vulkan/tu_cmd_buffer.c (diff) |
Commit
57b4f60add30bd00235de7633d09dc8ed7a6b67b
by eric+margeturnip: don't initialize GRAS_LRZ_CNTL/RB_LRZ_CNTL tu6_init_hw()
They will be initialized when emitting the draw state.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
|
 | src/freedreno/vulkan/tu_cmd_buffer.c (diff) |
Commit
03bea54e02901f188d03d5432f47fc9c57c4e12e
by eric+margemeson: fix power8 option
Do not throw a deprecation warning if the power8 option is set to the new 'disabled' value. Instead, warn if it is still set to the legacy value 'false'.
Fixes: 138c003d2273 ("meson: deprecated 'true' and 'false' in combo options for 'enabled' and 'disabled'") Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Eric Engestrom <eric@engestrom.ch> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6370>
|
 | meson.build (diff) |
Commit
e7e0468f73034b9dc0234cc5e0c82dfa69b5ba07
by eric+margegallium/util: fix memory-leak
When I originally wrote this code, I forgot to release the views the code creates, leaking a bit of memory that never gets cleaned up. That's not great, so let's plug it.
Fixes: e8a40715a8b ("gallium/util: add blitter-support for stencil-fallback") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6960>
|
 | src/gallium/auxiliary/util/u_blitter.c (diff) |
Commit
1c4929953575ad1216c12737c72f30ca31a7acfc
by eric+margegallium/util: allow scissored blits for stencil-fallback
It's also useful to be able to use scissor-testing for fallback-blits, as an CTS test-case does just that.
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6960>
|
 | src/gallium/auxiliary/util/u_blitter.h (diff) |
 | src/gallium/auxiliary/util/u_blitter.c (diff) |
Commit
100a5ace63635214cc3dcad2ebeb1cd7c4901321
by eric+margenir/find_array_copies: Properly discard copies for casts
In 9f3c595dfc4cd, we attempted to handle casts in opt_find_array_copies but missed a critical case. In particular, in the case where we begin finding a copy but then encounter a cast, we need to discard everything which might alias that cast.
Fixes: 9f3c595dfc4cd "nir/find_array_copies: Handle cast derefs" Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
|
 | src/compiler/nir/nir_opt_find_array_copies.c (diff) |
Commit
e363da3bdd3f16e9e9aba763230238479bfa4995
by eric+margenir: Handle memcpy in copy_prop_vars and combine_stores
Fixes: b2899f72657 "nir: Add a new memcpy intrinsic" Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
|
 | src/compiler/nir/nir_opt_combine_stores.c (diff) |
 | src/compiler/nir/nir_opt_copy_prop_vars.c (diff) |
Commit
f6667cb0ce828a8e4bc57e182ab1526fdd7a5e35
by eric+margenir: Add a memcpy optimization pass
This pass attempts to optimize three broad categories of memcpy:
1. Self-copies: These we can discard out-of-hand.
2. Vector copies: It doesn't matter what the vector size is or if the source and destination have different vector types, it's still easy enough to emit a load/store pair.
3. Tightly packed copies: In the case where a type is tightly packed (no padding bits), we can replace the memcpy with a copy_deref instruction which the optimizer is far better at handling.
This has proven capable of getting rid of many of the memcpy instances in some rather gnarly OpenCL C kernels I've been looking at, even after coming out of LLVM's optimizer.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
|
 | src/compiler/nir/meson.build (diff) |
 | src/compiler/nir/nir.h (diff) |
 | src/compiler/nir/nir_opt_memcpy.c |
 | src/compiler/Makefile.sources (diff) |
Commit
57e7c5f05eb15adf8e4d51a7536d8267e9ff0d2d
by eric+margenir/opt_load_store_vectorize: Use bit sizes when checking mask compatibility
Without this, it was checking bit size compatibility with bit sizes such as 96 which is clearly invalid.
No shader-db changes on Ice Lake
Fixes: ce9205c03bd20d "nir: add a load/store vectorization pass" Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
|
 | src/compiler/nir/nir_opt_load_store_vectorize.c (diff) |
Commit
769ede2de498c7d4522a054ccf819b2d786e3f2a
by eric+margenir: Add component mask re-interpret helpers
These are based on the ones which already existed in the load/store vectorization pass but I made some improvements while moving them. In particular,
1. They're both faster if the bit sizes are equal 2. The check is faster if old_bit_size > new_bit_size 3. The check now fails if it would use more than NIR_MAX_VEC_COMPONENTS
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
|
 | src/compiler/nir/nir_opt_load_store_vectorize.c (diff) |
 | src/compiler/nir/nir.h (diff) |
 | src/compiler/nir/nir.c (diff) |
|
 | src/compiler/nir/nir_deref.c (diff) |
Commit
9190f82d573c43e96c3e1c92e0350da755ba5f6a
by eric+margenir/opt_deref: Add an optimization for bitcasts
LLVM loves take advantage of the fact that vec3s in OpenCL are 16B aligned so it can just read/write them as vec4s. This is questionably legal except that it uses a xyz write-mask when it does it. The result is a LOT of vec4->vec3 casts on loads and stores. This optimization detects this case as well as other bit-cast cases and rewrites them to get rid of the cast.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
|
 | src/compiler/nir/nir_deref.c (diff) |
Commit
b2e1fc8976de00fb0924c08d6556106b44d2268b
by eric+margenir: Add a pass to lower vec3s to vec4s
LLVM loves take advantage of the fact that vec3s in OpenCL are 16B aligned and so it can just read/write them as vec4s. This results in a LOT of vec4->vec3 casts on loads and stores. One solution to this problem is to get rid of all vec3 variables.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
|
 | src/compiler/nir/nir.h (diff) |
 | src/compiler/nir_types.cpp (diff) |
 | src/compiler/glsl_types.cpp (diff) |
 | src/compiler/nir/meson.build (diff) |
 | src/compiler/nir_types.h (diff) |
 | src/compiler/Makefile.sources (diff) |
 | src/compiler/glsl_types.h (diff) |
 | src/compiler/nir/nir_lower_vec3_to_vec4.c |
Commit
37c1b9c54b7413a0f1b74592cf09683012cb73fa
by eric+margeaco: fix get_buffer_resource_flags()
Looks like a rebase error. After switching to derefs, we have to look through a nir_op_mov.
fossil-db (Navi): Totals from 846 (0.62% of 137413) affected shaders: SGPRs: 36856 -> 44144 (+19.77%); split: -0.20%, +19.97% VGPRs: 35968 -> 27852 (-22.56%); split: -22.64%, +0.08% SpillSGPRs: 1366 -> 1662 (+21.67%); split: -0.95%, +22.62% SpillVGPRs: 1909 -> 1893 (-0.84%) CodeSize: 5209588 -> 5146536 (-1.21%); split: -1.89%, +0.68% Scratch: 221184 -> 217088 (-1.85%) MaxWaves: 11488 -> 14266 (+24.18%); split: +24.20%, -0.02% Instrs: 994831 -> 974318 (-2.06%); split: -2.53%, +0.47% Cycles: 45719692 -> 45843260 (+0.27%); split: -0.99%, +1.26% VMEM: 147562 -> 94468 (-35.98%); split: +9.75%, -45.74% SMEM: 32122 -> 66023 (+105.54%); split: +120.34%, -14.80% VClause: 41051 -> 20565 (-49.90%); split: -50.00%, +0.09% SClause: 18076 -> 40142 (+122.07%) Copies: 100092 -> 103521 (+3.43%); split: -0.98%, +4.40% Branches: 51244 -> 51533 (+0.56%); split: -0.02%, +0.58% PreSGPRs: 32290 -> 34267 (+6.12%) PreVGPRs: 27458 -> 25290 (-7.90%); split: -7.91%, +0.01%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Fixes: 05b6612b4ec ('radv: do not lower UBO/SSBO access to offsets') Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6966>
|
 | src/amd/compiler/aco_instruction_selection.h (diff) |
|
 | debian/changelog (diff) |